diff --git a/README.md b/README.md index 5223fe0..01a5876 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,6 @@ # DFPlayer Motherboard for Atopile -A compact, SMD-based motherboard for the popular [DFPlayer Mini[(https://www.dfrobot.com/wiki/index.php/DFPlayer_Mini_SKU:DFR0299)]) MP3 module, designed using the atopile hardware description language. +A compact, SMD-based motherboard for the popular [DFPlayer Mini](https://www.dfrobot.com/wiki/index.php/DFPlayer_Mini_SKU:DFR0299) MP3 module, designed using the atopile hardware description language. This board serves as a carrier for the DFPlayer, providing stable power, protection, and convenient interfaces for audio input and output. It is designed to be easily integrated into larger audio projects. diff --git a/build/logs/archive/2025-09-27_12-55-18/default/init-default.debug.log b/build/logs/archive/2025-09-27_12-55-18/default/init-default.debug.log new file mode 100644 index 0000000..000eb71 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/init-default.debug.log @@ -0,0 +1,8 @@ +[12:55:20] DEBUG Assignment: power_5v.voltage [power_5v.voltage] := [4.947V, 5.253V] + DEBUG Constraining power_5v.voltage to [4.947V, 5.253V] + DEBUG Assignment: power_filter_cap.capacitance [power_filter_cap.capacitance] := [376µF, 564µF] + DEBUG Constraining power_filter_cap.capacitance to [376µF, 564µF] + DEBUG Assignment: power_filter_cap.voltage [power_filter_cap.voltage] := [10V] + DEBUG Constraining power_filter_cap.voltage to [10V] + DEBUG Assignment: rx_protection_resistor.resistance [rx_protection_resistor.resistance] := [1kΩ ± 5.00%] + DEBUG Constraining rx_protection_resistor.resistance to [1kΩ ± 5.00%] diff --git a/build/logs/archive/2025-09-27_12-55-18/default/init-default.error.log b/build/logs/archive/2025-09-27_12-55-18/default/init-default.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/init-default.info.log b/build/logs/archive/2025-09-27_12-55-18/default/init-default.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/init-default.warning.log b/build/logs/archive/2025-09-27_12-55-18/default/init-default.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.debug.log b/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.debug.log new file mode 100644 index 0000000..08557d2 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.debug.log @@ -0,0 +1 @@ +[12:55:20] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.error.log b/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.info.log b/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.info.log new file mode 100644 index 0000000..08557d2 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.info.log @@ -0,0 +1 @@ +[12:55:20] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.warning.log b/build/logs/archive/2025-09-27_12-55-18/default/load-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/picker.debug.log b/build/logs/archive/2025-09-27_12-55-18/default/picker.debug.log new file mode 100644 index 0000000..caa49c9 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/picker.debug.log @@ -0,0 +1,253 @@ +[12:55:21] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=16----------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=40----------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=38---------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=37---------------------------------------------------------------------------- +[12:55:22] DEBUG POST https://components.atopileapi.com/v0/query + { + "queries": [ + { + "package": { + "type": "EnumSet", + "data": { + "elements": [ + { + "name": "R0805" + } + ], + "enum": { + "name": "BackendPackage", + "values": { + "R01005": "R01005", + "R0201": "R0201", + "R0402": "R0402", + "R0603": "R0603", + "R0805": "R0805", + "R1206": "R1206", + "R1210": "R1210", + "R1808": "R1808", + "R1812": "R1812", + "R1825": "R1825", + "R2220": "R2220", + "R2225": "R2225", + "R3640": "R3640", + "C01005": "C01005", + "C0201": "C0201", + "C0402": "C0402", + "C0603": "C0603", + "C0805": "C0805", + "C1206": "C1206", + "C1210": "C1210", + "C1808": "C1808", + "C1812": "C1812", + "C1825": "C1825", + "C2220": "C2220", + "C2225": "C2225", + "C3640": "C3640", + "L01005": "L01005", + "L0201": "L0201", + "L0402": "L0402", + "L0603": "L0603", + "L0805": "L0805", + "L1206": "L1206", + "L1210": "L1210", + "L1808": "L1808", + "L1812": "L1812", + "L1825": "L1825", + "L2220": "L2220", + "L2225": "L2225", + "L3640": "L3640", + "SMD,4x4mm": "SMD,4x4mm", + "SMD,6x6mm": "SMD,6x6mm", + "SMD,5x5mm": "SMD,5x5mm", + "SMD,3x3mm": "SMD,3x3mm", + "SMD,8x8mm": "SMD,8x8mm", + "SMD,12x12mm": "SMD,12x12mm", + "SMD,12.5x12.5mm": "SMD,12.5x12.5mm", + "SMD,7.8x7mm": "SMD,7.8x7mm", + "SMD,4.5x4mm": "SMD,4.5x4mm", + "SMD,11.5x10mm": "SMD,11.5x10mm", + "SMD,6.6x7mm": "SMD,6.6x7mm", + "SMD,7x6.6mm": "SMD,7x6.6mm", + "SMD,5.8x5.2mm": "SMD,5.8x5.2mm", + "SMD,6.6x7.3mm": "SMD,6.6x7.3mm", + "SMD,3.5x3mm": "SMD,3.5x3mm", + "SMD,7.3x7.3mm": "SMD,7.3x7.3mm", + "SMD,6.6x7.1mm": "SMD,6.6x7.1mm", + "SMD,7x7mm": "SMD,7x7mm", + "SMD,5.4x5.2mm": "SMD,5.4x5.2mm", + "SMD,6.7x6.7mm": "SMD,6.7x6.7mm", + "SMD,11x10mm": "SMD,11x10mm", + "SMD,10x11mm": "SMD,10x11mm", + "SMD,5.2x5.8mm": "SMD,5.2x5.8mm", + "SMD,4.4x4.2mm": "SMD,4.4x4.2mm", + "SMD,13.8x12.6mm": "SMD,13.8x12.6mm", + "SMD,10.1x10.1mm": "SMD,10.1x10.1mm", + "SMD,13.5x12.6mm": "SMD,13.5x12.6mm", + "SMD,4.7x4.7mm": "SMD,4.7x4.7mm", + "SMD,12.3x12.3mm": "SMD,12.3x12.3mm", + "SMD,12.6x13.5mm": "SMD,12.6x13.5mm", + "SMD,2.8x2.9mm": "SMD,2.8x2.9mm", + "SMD,7.3x6.6mm": "SMD,7.3x6.6mm", + "SMD,2.5x2mm": "SMD,2.5x2mm", + "SMD,4.9x4.9mm": "SMD,4.9x4.9mm", + "SMD,10.2x10mm": "SMD,10.2x10mm", + "SMD,7.1x6.6mm": "SMD,7.1x6.6mm", + "SMD,10x10mm": "SMD,10x10mm", + "SMD,5.7x5.7mm": "SMD,5.7x5.7mm", + "SMD,4.1x4.1mm": "SMD,4.1x4.1mm", + "SMD,4.1x4.5mm": "SMD,4.1x4.5mm", + "SMD,7x7.8mm": "SMD,7x7.8mm", + "SMD,10x9mm": "SMD,10x9mm", + "SMD,0.6x1.2mm": "SMD,0.6x1.2mm", + "SMD,6.5x6.9mm": "SMD,6.5x6.9mm", + "SMD,1.6x2mm": "SMD,1.6x2mm", + "SMD,2x2.5mm": "SMD,2x2.5mm", + "SMD,7.1x6.5mm": "SMD,7.1x6.5mm", + "SMD,8x8.5mm": "SMD,8x8.5mm", + "SMD,4.5x4.1mm": "SMD,4.5x4.1mm", + "SMD,4.2x4.4mm": "SMD,4.2x4.4mm", + "SMD,10.4x10.3mm": "SMD,10.4x10.3mm", + "SMD,10x11.5mm": "SMD,10x11.5mm", + "SMD,13.5x12.8mm": "SMD,13.5x12.8mm", + "SMD,17.2x17.2mm": "SMD,17.2x17.2mm", + "SMD,5.2x5.4mm": "SMD,5.2x5.4mm", + "SMD,11.6x10.1mm": "SMD,11.6x10.1mm", + "SMD,10.5x10.3mm": "SMD,10.5x10.3mm", + "SMD,7.2x6.6mm": "SMD,7.2x6.6mm", + "SMD,10x10.2mm": "SMD,10x10.2mm", + "SMD,7.8x7.8mm": "SMD,7.8x7.8mm", + "SMD,1.7x2.3mm": "SMD,1.7x2.3mm", + "SMD,5.2x5.7mm": "SMD,5.2x5.7mm", + "SMD,2x2mm": "SMD,2x2mm", + "SMD,4.5x5.2mm": "SMD,4.5x5.2mm", + "SMD,9x10mm": "SMD,9x10mm", + "SMD,2.5x2.9mm": "SMD,2.5x2.9mm", + "SMD,4.6x4.1mm": "SMD,4.6x4.1mm", + "SMD,7.5x7.5mm": "SMD,7.5x7.5mm", + "SMD,5.5x5.2mm": "SMD,5.5x5.2mm", + "SMD,6.4x6.6mm": "SMD,6.4x6.6mm", + "SMD,12.5x13.5mm": "SMD,12.5x13.5mm", + "SMD,10.7x10mm": "SMD,10.7x10mm", + "SMD,5.5x5.3mm": "SMD,5.5x5.3mm", + "SMD,10.1x11.6mm": "SMD,10.1x11.6mm", + "SMD,10.3x10.5mm": "SMD,10.3x10.5mm", + "SMD,3.2x3mm": "SMD,3.2x3mm", + "SMD,6.6x6.4mm": "SMD,6.6x6.4mm", + "SMD,1.2x0.6mm": "SMD,1.2x0.6mm", + "SMD,1.2x1.8mm": "SMD,1.2x1.8mm", + "SMD,5x5.2mm": "SMD,5x5.2mm", + "SMD,8.3x8.3mm": "SMD,8.3x8.3mm", + "SMD,10.2x10.8mm": "SMD,10.2x10.8mm", + "SMD,2.5x3.2mm": "SMD,2.5x3.2mm", + "SMD,4x4.5mm": "SMD,4x4.5mm", + "SMD,8.5x8mm": "SMD,8.5x8mm", + "SMD,3.5x3.2mm": "SMD,3.5x3.2mm", + "SMD,12.9x13.2mm": "SMD,12.9x13.2mm", + "SMD,8.8x8.2mm": "SMD,8.8x8.2mm", + "SMD,4.1x4.4mm": "SMD,4.1x4.4mm", + "SMD,10.8x10mm": "SMD,10.8x10mm", + "SMD,10.5x10mm": "SMD,10.5x10mm", + "SMD,1.1x1.8mm": "SMD,1.1x1.8mm", + "SMD,7.5x7mm": "SMD,7.5x7mm", + "SMD,3.8x3.8mm": "SMD,3.8x3.8mm", + "SMD,1.6x2.2mm": "SMD,1.6x2.2mm", + "SMD,12.2x12.2mm": "SMD,12.2x12.2mm", + "SMD,4.8x4.8mm": "SMD,4.8x4.8mm", + "SMD,5.7x5.4mm": "SMD,5.7x5.4mm", + "SMD,15.5x16.5mm": "SMD,15.5x16.5mm", + "SMD,8.2x8.8mm": "SMD,8.2x8.8mm", + "SMD,10x14mm": "SMD,10x14mm", + "SMD,5.1x5.4mm": "SMD,5.1x5.4mm", + "SMD,16.5x15.5mm": "SMD,16.5x15.5mm", + "SMD,2.1x3mm": "SMD,2.1x3mm", + "SMD,10x11.6mm": "SMD,10x11.6mm", + "SMD,3.2x4mm": "SMD,3.2x4mm", + "SMD,7.2x7.9mm": "SMD,7.2x7.9mm", + "SMD,5.8x5.8mm": "SMD,5.8x5.8mm", + "SMD,6.6x7.4mm": "SMD,6.6x7.4mm", + "SMD,12.7x12.7mm": "SMD,12.7x12.7mm", + "SMD,1.2x2mm": "SMD,1.2x2mm", + "SMD,1x1.7mm": "SMD,1x1.7mm", + "SMD,4.4x4.1mm": "SMD,4.4x4.1mm", + "SMD,4.2x4.2mm": "SMD,4.2x4.2mm" + } + } + } + }, + "qty": 1, + "endpoint": "resistors", + "resistance": { + "type": "Quantity_Interval_Disjoint", + "data": { + "intervals": { + "type": "Numeric_Interval_Disjoint", + "data": { + "intervals": [ + { + "type": "Numeric_Interval", + "data": { + "min": 950.0, + "max": 1050.0 + } + } + ] + } + }, + "unit": "kiloohm" + } + }, + "max_power": null, + "max_voltage": null + } + ] + } + DEBUG Downloading API data C17513 +[12:55:23] DEBUG GET https://components.atopileapi.com/v0/component/lcsc/17513 + DEBUG Crawling datasheet for C17513 +[12:55:24] DEBUG { + 0: { + 0: + } + } + INFO Picking 1 independent groups: { + 0: + } + DEBUG Attached component C17513 to module rx_protection_resistor: + {'resistance': {'type': 'Quantity_Interval_Disjoint', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 990.0000002235174, 'max': 1009.9999997764826}}]}}, 'unit': 'ohm'}}, 'max_power': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 0.125, 'max': 0.125}}]}}, 'unit': 'watt'}}, + 'max_voltage': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 150.0, 'max': 150.0}}]}}, 'unit': 'volt'}}} + ---> + max_power: rx_protection_resistor.max_power + max_voltage: rx_protection_resistor.max_voltage + resistance: rx_protection_resistor.resistance + INFO Slow-picked parts in 2.88s + INFO Picked complete: picked 1 parts + INFO Verify design + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=19----------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=46----------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=44---------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=43---------------------------------------------------------------------------- diff --git a/build/logs/archive/2025-09-27_12-55-18/default/picker.error.log b/build/logs/archive/2025-09-27_12-55-18/default/picker.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/picker.info.log b/build/logs/archive/2025-09-27_12-55-18/default/picker.info.log new file mode 100644 index 0000000..7c28786 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/picker.info.log @@ -0,0 +1,11 @@ +[12:55:21] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel +[12:55:24] INFO Picking 1 independent groups: { + 0: + } + INFO Slow-picked parts in 2.88s + INFO Picked complete: picked 1 parts + INFO Verify design diff --git a/build/logs/archive/2025-09-27_12-55-18/default/picker.warning.log b/build/logs/archive/2025-09-27_12-55-18/default/picker.warning.log new file mode 100644 index 0000000..a105538 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/picker.warning.log @@ -0,0 +1,3 @@ +[12:55:21] WARNING No pickers for { + 0: + } diff --git a/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.debug.log b/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.debug.log new file mode 100644 index 0000000..2d34777 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.debug.log @@ -0,0 +1,8 @@ +[12:55:20] INFO Running design checks for stage POST_DESIGN + DEBUG Running post-design check `needs_erc_check` for `runtime_anon[9]` + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.error.log b/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.info.log b/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.info.log new file mode 100644 index 0000000..0a21c59 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.info.log @@ -0,0 +1,7 @@ +[12:55:20] INFO Running design checks for stage POST_DESIGN + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.warning.log b/build/logs/archive/2025-09-27_12-55-18/default/post-design-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.debug.log b/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.debug.log new file mode 100644 index 0000000..6579b33 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.debug.log @@ -0,0 +1,3 @@ +[12:55:24] INFO Running checks + INFO Running design checks for stage POST_SOLVE + DEBUG Running post-solve check `needs_erc_check` for `runtime_anon[9]` diff --git a/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.error.log b/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.info.log b/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.info.log new file mode 100644 index 0000000..195c145 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.info.log @@ -0,0 +1,2 @@ +[12:55:24] INFO Running checks + INFO Running design checks for stage POST_SOLVE diff --git a/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.warning.log b/build/logs/archive/2025-09-27_12-55-18/default/post-solve-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.debug.log b/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.debug.log new file mode 100644 index 0000000..9bc8b1d --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.debug.log @@ -0,0 +1,9 @@ +[12:55:20] INFO Resolving bus parameters + DEBUG  Timings  + ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━┳━━━━━━┓ + ┃ Category  ┃  Value ┃ Unit ┃ + ┡━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━╇━━━━━━┩ + │ get parameter connections │ 109.84 │ µs  │ + │ merge parameters  │ 702.62 │ µs  │ + └───────────────────────────┴────────┴──────┘ + diff --git a/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.error.log b/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.info.log b/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.info.log new file mode 100644 index 0000000..e7dfeb2 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.info.log @@ -0,0 +1 @@ +[12:55:20] INFO Resolving bus parameters diff --git a/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.warning.log b/build/logs/archive/2025-09-27_12-55-18/default/prepare-build.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/prepare-nets.debug.log b/build/logs/archive/2025-09-27_12-55-18/default/prepare-nets.debug.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/prepare-nets.error.log b/build/logs/archive/2025-09-27_12-55-18/default/prepare-nets.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/prepare-nets.info.log b/build/logs/archive/2025-09-27_12-55-18/default/prepare-nets.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/prepare-nets.warning.log b/build/logs/archive/2025-09-27_12-55-18/default/prepare-nets.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.debug.log b/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.debug.log new file mode 100644 index 0000000..31adc67 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.debug.log @@ -0,0 +1 @@ +[12:55:24] INFO Adding `MountingHole:MountingHole_2.2mm_M2_Pad` as `m2_with_pad` (H3) diff --git a/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.error.log b/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.info.log b/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.info.log new file mode 100644 index 0000000..31adc67 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.info.log @@ -0,0 +1 @@ +[12:55:24] INFO Adding `MountingHole:MountingHole_2.2mm_M2_Pad` as `m2_with_pad` (H3) diff --git a/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.warning.log b/build/logs/archive/2025-09-27_12-55-18/default/update-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/init-default.debug.log b/build/logs/archive/2025-09-27_12-57-13/default/init-default.debug.log new file mode 100644 index 0000000..7a721d2 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/init-default.debug.log @@ -0,0 +1,8 @@ +[12:57:15] DEBUG Assignment: power_5v.voltage [power_5v.voltage] := [4.947V, 5.253V] + DEBUG Constraining power_5v.voltage to [4.947V, 5.253V] + DEBUG Assignment: power_filter_cap.capacitance [power_filter_cap.capacitance] := [376µF, 564µF] + DEBUG Constraining power_filter_cap.capacitance to [376µF, 564µF] + DEBUG Assignment: power_filter_cap.voltage [power_filter_cap.voltage] := [10V] + DEBUG Constraining power_filter_cap.voltage to [10V] + DEBUG Assignment: rx_protection_resistor.resistance [rx_protection_resistor.resistance] := [1kΩ ± 5.00%] + DEBUG Constraining rx_protection_resistor.resistance to [1kΩ ± 5.00%] diff --git a/build/logs/archive/2025-09-27_12-57-13/default/init-default.error.log b/build/logs/archive/2025-09-27_12-57-13/default/init-default.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/init-default.info.log b/build/logs/archive/2025-09-27_12-57-13/default/init-default.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/init-default.warning.log b/build/logs/archive/2025-09-27_12-57-13/default/init-default.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.debug.log b/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.debug.log new file mode 100644 index 0000000..d2c73fe --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.debug.log @@ -0,0 +1 @@ +[12:57:15] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.error.log b/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.info.log b/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.info.log new file mode 100644 index 0000000..d2c73fe --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.info.log @@ -0,0 +1 @@ +[12:57:15] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.warning.log b/build/logs/archive/2025-09-27_12-57-13/default/load-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/picker.debug.log b/build/logs/archive/2025-09-27_12-57-13/default/picker.debug.log new file mode 100644 index 0000000..1b1fd48 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/picker.debug.log @@ -0,0 +1,253 @@ +[12:57:16] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=16-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=40-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=38------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=37------------------------------------------------------------------------------------------------------------------------------------------------------------- +[12:57:17] DEBUG POST https://components.atopileapi.com/v0/query + { + "queries": [ + { + "package": { + "type": "EnumSet", + "data": { + "elements": [ + { + "name": "R0805" + } + ], + "enum": { + "name": "BackendPackage", + "values": { + "R01005": "R01005", + "R0201": "R0201", + "R0402": "R0402", + "R0603": "R0603", + "R0805": "R0805", + "R1206": "R1206", + "R1210": "R1210", + "R1808": "R1808", + "R1812": "R1812", + "R1825": "R1825", + "R2220": "R2220", + "R2225": "R2225", + "R3640": "R3640", + "C01005": "C01005", + "C0201": "C0201", + "C0402": "C0402", + "C0603": "C0603", + "C0805": "C0805", + "C1206": "C1206", + "C1210": "C1210", + "C1808": "C1808", + "C1812": "C1812", + "C1825": "C1825", + "C2220": "C2220", + "C2225": "C2225", + "C3640": "C3640", + "L01005": "L01005", + "L0201": "L0201", + "L0402": "L0402", + "L0603": "L0603", + "L0805": "L0805", + "L1206": "L1206", + "L1210": "L1210", + "L1808": "L1808", + "L1812": "L1812", + "L1825": "L1825", + "L2220": "L2220", + "L2225": "L2225", + "L3640": "L3640", + "SMD,4x4mm": "SMD,4x4mm", + "SMD,6x6mm": "SMD,6x6mm", + "SMD,5x5mm": "SMD,5x5mm", + "SMD,3x3mm": "SMD,3x3mm", + "SMD,8x8mm": "SMD,8x8mm", + "SMD,12x12mm": "SMD,12x12mm", + "SMD,12.5x12.5mm": "SMD,12.5x12.5mm", + "SMD,7.8x7mm": "SMD,7.8x7mm", + "SMD,4.5x4mm": "SMD,4.5x4mm", + "SMD,11.5x10mm": "SMD,11.5x10mm", + "SMD,6.6x7mm": "SMD,6.6x7mm", + "SMD,7x6.6mm": "SMD,7x6.6mm", + "SMD,5.8x5.2mm": "SMD,5.8x5.2mm", + "SMD,6.6x7.3mm": "SMD,6.6x7.3mm", + "SMD,3.5x3mm": "SMD,3.5x3mm", + "SMD,7.3x7.3mm": "SMD,7.3x7.3mm", + "SMD,6.6x7.1mm": "SMD,6.6x7.1mm", + "SMD,7x7mm": "SMD,7x7mm", + "SMD,5.4x5.2mm": "SMD,5.4x5.2mm", + "SMD,6.7x6.7mm": "SMD,6.7x6.7mm", + "SMD,11x10mm": "SMD,11x10mm", + "SMD,10x11mm": "SMD,10x11mm", + "SMD,5.2x5.8mm": "SMD,5.2x5.8mm", + "SMD,4.4x4.2mm": "SMD,4.4x4.2mm", + "SMD,13.8x12.6mm": "SMD,13.8x12.6mm", + "SMD,10.1x10.1mm": "SMD,10.1x10.1mm", + "SMD,13.5x12.6mm": "SMD,13.5x12.6mm", + "SMD,4.7x4.7mm": "SMD,4.7x4.7mm", + "SMD,12.3x12.3mm": "SMD,12.3x12.3mm", + "SMD,12.6x13.5mm": "SMD,12.6x13.5mm", + "SMD,2.8x2.9mm": "SMD,2.8x2.9mm", + "SMD,7.3x6.6mm": "SMD,7.3x6.6mm", + "SMD,2.5x2mm": "SMD,2.5x2mm", + "SMD,4.9x4.9mm": "SMD,4.9x4.9mm", + "SMD,10.2x10mm": "SMD,10.2x10mm", + "SMD,7.1x6.6mm": "SMD,7.1x6.6mm", + "SMD,10x10mm": "SMD,10x10mm", + "SMD,5.7x5.7mm": "SMD,5.7x5.7mm", + "SMD,4.1x4.1mm": "SMD,4.1x4.1mm", + "SMD,4.1x4.5mm": "SMD,4.1x4.5mm", + "SMD,7x7.8mm": "SMD,7x7.8mm", + "SMD,10x9mm": "SMD,10x9mm", + "SMD,0.6x1.2mm": "SMD,0.6x1.2mm", + "SMD,6.5x6.9mm": "SMD,6.5x6.9mm", + "SMD,1.6x2mm": "SMD,1.6x2mm", + "SMD,2x2.5mm": "SMD,2x2.5mm", + "SMD,7.1x6.5mm": "SMD,7.1x6.5mm", + "SMD,8x8.5mm": "SMD,8x8.5mm", + "SMD,4.5x4.1mm": "SMD,4.5x4.1mm", + "SMD,4.2x4.4mm": "SMD,4.2x4.4mm", + "SMD,10.4x10.3mm": "SMD,10.4x10.3mm", + "SMD,10x11.5mm": "SMD,10x11.5mm", + "SMD,13.5x12.8mm": "SMD,13.5x12.8mm", + "SMD,17.2x17.2mm": "SMD,17.2x17.2mm", + "SMD,5.2x5.4mm": "SMD,5.2x5.4mm", + "SMD,11.6x10.1mm": "SMD,11.6x10.1mm", + "SMD,10.5x10.3mm": "SMD,10.5x10.3mm", + "SMD,7.2x6.6mm": "SMD,7.2x6.6mm", + "SMD,10x10.2mm": "SMD,10x10.2mm", + "SMD,7.8x7.8mm": "SMD,7.8x7.8mm", + "SMD,1.7x2.3mm": "SMD,1.7x2.3mm", + "SMD,5.2x5.7mm": "SMD,5.2x5.7mm", + "SMD,2x2mm": "SMD,2x2mm", + "SMD,4.5x5.2mm": "SMD,4.5x5.2mm", + "SMD,9x10mm": "SMD,9x10mm", + "SMD,2.5x2.9mm": "SMD,2.5x2.9mm", + "SMD,4.6x4.1mm": "SMD,4.6x4.1mm", + "SMD,7.5x7.5mm": "SMD,7.5x7.5mm", + "SMD,5.5x5.2mm": "SMD,5.5x5.2mm", + "SMD,6.4x6.6mm": "SMD,6.4x6.6mm", + "SMD,12.5x13.5mm": "SMD,12.5x13.5mm", + "SMD,10.7x10mm": "SMD,10.7x10mm", + "SMD,5.5x5.3mm": "SMD,5.5x5.3mm", + "SMD,10.1x11.6mm": "SMD,10.1x11.6mm", + "SMD,10.3x10.5mm": "SMD,10.3x10.5mm", + "SMD,3.2x3mm": "SMD,3.2x3mm", + "SMD,6.6x6.4mm": "SMD,6.6x6.4mm", + "SMD,1.2x0.6mm": "SMD,1.2x0.6mm", + "SMD,1.2x1.8mm": "SMD,1.2x1.8mm", + "SMD,5x5.2mm": "SMD,5x5.2mm", + "SMD,8.3x8.3mm": "SMD,8.3x8.3mm", + "SMD,10.2x10.8mm": "SMD,10.2x10.8mm", + "SMD,2.5x3.2mm": "SMD,2.5x3.2mm", + "SMD,4x4.5mm": "SMD,4x4.5mm", + "SMD,8.5x8mm": "SMD,8.5x8mm", + "SMD,3.5x3.2mm": "SMD,3.5x3.2mm", + "SMD,12.9x13.2mm": "SMD,12.9x13.2mm", + "SMD,8.8x8.2mm": "SMD,8.8x8.2mm", + "SMD,4.1x4.4mm": "SMD,4.1x4.4mm", + "SMD,10.8x10mm": "SMD,10.8x10mm", + "SMD,10.5x10mm": "SMD,10.5x10mm", + "SMD,1.1x1.8mm": "SMD,1.1x1.8mm", + "SMD,7.5x7mm": "SMD,7.5x7mm", + "SMD,3.8x3.8mm": "SMD,3.8x3.8mm", + "SMD,1.6x2.2mm": "SMD,1.6x2.2mm", + "SMD,12.2x12.2mm": "SMD,12.2x12.2mm", + "SMD,4.8x4.8mm": "SMD,4.8x4.8mm", + "SMD,5.7x5.4mm": "SMD,5.7x5.4mm", + "SMD,15.5x16.5mm": "SMD,15.5x16.5mm", + "SMD,8.2x8.8mm": "SMD,8.2x8.8mm", + "SMD,10x14mm": "SMD,10x14mm", + "SMD,5.1x5.4mm": "SMD,5.1x5.4mm", + "SMD,16.5x15.5mm": "SMD,16.5x15.5mm", + "SMD,2.1x3mm": "SMD,2.1x3mm", + "SMD,10x11.6mm": "SMD,10x11.6mm", + "SMD,3.2x4mm": "SMD,3.2x4mm", + "SMD,7.2x7.9mm": "SMD,7.2x7.9mm", + "SMD,5.8x5.8mm": "SMD,5.8x5.8mm", + "SMD,6.6x7.4mm": "SMD,6.6x7.4mm", + "SMD,12.7x12.7mm": "SMD,12.7x12.7mm", + "SMD,1.2x2mm": "SMD,1.2x2mm", + "SMD,1x1.7mm": "SMD,1x1.7mm", + "SMD,4.4x4.1mm": "SMD,4.4x4.1mm", + "SMD,4.2x4.2mm": "SMD,4.2x4.2mm" + } + } + } + }, + "qty": 1, + "endpoint": "resistors", + "resistance": { + "type": "Quantity_Interval_Disjoint", + "data": { + "intervals": { + "type": "Numeric_Interval_Disjoint", + "data": { + "intervals": [ + { + "type": "Numeric_Interval", + "data": { + "min": 950.0, + "max": 1050.0 + } + } + ] + } + }, + "unit": "kiloohm" + } + }, + "max_power": null, + "max_voltage": null + } + ] + } + DEBUG Downloading API data C17513 +[12:57:18] DEBUG GET https://components.atopileapi.com/v0/component/lcsc/17513 + DEBUG Crawling datasheet for C17513 + DEBUG { + 0: { + 0: + } + } + INFO Picking 1 independent groups: { + 0: + } + DEBUG Attached component C17513 to module rx_protection_resistor: + {'resistance': {'type': 'Quantity_Interval_Disjoint', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 990.0000002235174, 'max': 1009.9999997764826}}]}}, 'unit': 'ohm'}}, 'max_power': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 0.125, 'max': 0.125}}]}}, 'unit': 'watt'}}, + 'max_voltage': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 150.0, 'max': 150.0}}]}}, 'unit': 'volt'}}} + ---> + max_power: rx_protection_resistor.max_power + max_voltage: rx_protection_resistor.max_voltage + resistance: rx_protection_resistor.resistance + INFO Slow-picked parts in 2.77s + INFO Picked complete: picked 1 parts + INFO Verify design + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=19-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=46-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=44------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=43------------------------------------------------------------------------------------------------------------------------------------------------------------- diff --git a/build/logs/archive/2025-09-27_12-57-13/default/picker.error.log b/build/logs/archive/2025-09-27_12-57-13/default/picker.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/picker.info.log b/build/logs/archive/2025-09-27_12-57-13/default/picker.info.log new file mode 100644 index 0000000..791ffcf --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/picker.info.log @@ -0,0 +1,11 @@ +[12:57:16] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel +[12:57:18] INFO Picking 1 independent groups: { + 0: + } + INFO Slow-picked parts in 2.77s + INFO Picked complete: picked 1 parts + INFO Verify design diff --git a/build/logs/archive/2025-09-27_12-57-13/default/picker.warning.log b/build/logs/archive/2025-09-27_12-57-13/default/picker.warning.log new file mode 100644 index 0000000..6b27a32 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/picker.warning.log @@ -0,0 +1,3 @@ +[12:57:16] WARNING No pickers for { + 0: + } diff --git a/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.debug.log b/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.debug.log new file mode 100644 index 0000000..ceb79b9 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.debug.log @@ -0,0 +1,8 @@ +[12:57:15] INFO Running design checks for stage POST_DESIGN + DEBUG Running post-design check `needs_erc_check` for `runtime_anon[9]` + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.error.log b/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.info.log b/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.info.log new file mode 100644 index 0000000..79d6426 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.info.log @@ -0,0 +1,7 @@ +[12:57:15] INFO Running design checks for stage POST_DESIGN + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.warning.log b/build/logs/archive/2025-09-27_12-57-13/default/post-design-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.debug.log b/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.debug.log new file mode 100644 index 0000000..8490aae --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.debug.log @@ -0,0 +1,3 @@ +[12:57:19] INFO Running checks + INFO Running design checks for stage POST_SOLVE + DEBUG Running post-solve check `needs_erc_check` for `runtime_anon[9]` diff --git a/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.error.log b/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.info.log b/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.info.log new file mode 100644 index 0000000..43392c8 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.info.log @@ -0,0 +1,2 @@ +[12:57:19] INFO Running checks + INFO Running design checks for stage POST_SOLVE diff --git a/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.warning.log b/build/logs/archive/2025-09-27_12-57-13/default/post-solve-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.debug.log b/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.debug.log new file mode 100644 index 0000000..28789b1 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.debug.log @@ -0,0 +1,9 @@ +[12:57:15] INFO Resolving bus parameters + DEBUG  Timings  + ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━┳━━━━━━┓ + ┃ Category  ┃  Value ┃ Unit ┃ + ┡━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━╇━━━━━━┩ + │ get parameter connections │ 159.36 │ µs  │ + │ merge parameters  │ 808.86 │ µs  │ + └───────────────────────────┴────────┴──────┘ + diff --git a/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.error.log b/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.info.log b/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.info.log new file mode 100644 index 0000000..99b0dba --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.info.log @@ -0,0 +1 @@ +[12:57:15] INFO Resolving bus parameters diff --git a/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.warning.log b/build/logs/archive/2025-09-27_12-57-13/default/prepare-build.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/prepare-nets.debug.log b/build/logs/archive/2025-09-27_12-57-13/default/prepare-nets.debug.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/prepare-nets.error.log b/build/logs/archive/2025-09-27_12-57-13/default/prepare-nets.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/prepare-nets.info.log b/build/logs/archive/2025-09-27_12-57-13/default/prepare-nets.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/prepare-nets.warning.log b/build/logs/archive/2025-09-27_12-57-13/default/prepare-nets.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.debug.log b/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.debug.log new file mode 100644 index 0000000..205f1e1 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.debug.log @@ -0,0 +1 @@ +[12:57:19] INFO Adding `MountingHole:MountingHole_2.2mm_M2_Pad` as `m2_with_pad` (H3) diff --git a/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.error.log b/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.info.log b/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.info.log new file mode 100644 index 0000000..205f1e1 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.info.log @@ -0,0 +1 @@ +[12:57:19] INFO Adding `MountingHole:MountingHole_2.2mm_M2_Pad` as `m2_with_pad` (H3) diff --git a/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.warning.log b/build/logs/archive/2025-09-27_12-57-13/default/update-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/init-default.debug.log b/build/logs/archive/2025-09-27_12-59-38/default/init-default.debug.log new file mode 100644 index 0000000..1a09baa --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/init-default.debug.log @@ -0,0 +1,8 @@ +[12:59:40] DEBUG Assignment: power_5v.voltage [power_5v.voltage] := [4.947V, 5.253V] + DEBUG Constraining power_5v.voltage to [4.947V, 5.253V] + DEBUG Assignment: power_filter_cap.capacitance [power_filter_cap.capacitance] := [376µF, 564µF] + DEBUG Constraining power_filter_cap.capacitance to [376µF, 564µF] + DEBUG Assignment: power_filter_cap.voltage [power_filter_cap.voltage] := [10V] + DEBUG Constraining power_filter_cap.voltage to [10V] + DEBUG Assignment: rx_protection_resistor.resistance [rx_protection_resistor.resistance] := [1kΩ ± 5.00%] + DEBUG Constraining rx_protection_resistor.resistance to [1kΩ ± 5.00%] diff --git a/build/logs/archive/2025-09-27_12-59-38/default/init-default.error.log b/build/logs/archive/2025-09-27_12-59-38/default/init-default.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/init-default.info.log b/build/logs/archive/2025-09-27_12-59-38/default/init-default.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/init-default.warning.log b/build/logs/archive/2025-09-27_12-59-38/default/init-default.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.debug.log b/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.debug.log new file mode 100644 index 0000000..2c19206 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.debug.log @@ -0,0 +1 @@ +[12:59:40] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.error.log b/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.info.log b/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.info.log new file mode 100644 index 0000000..2c19206 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.info.log @@ -0,0 +1 @@ +[12:59:40] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.warning.log b/build/logs/archive/2025-09-27_12-59-38/default/load-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/picker.debug.log b/build/logs/archive/2025-09-27_12-59-38/default/picker.debug.log new file mode 100644 index 0000000..8c7be47 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/picker.debug.log @@ -0,0 +1,253 @@ +[12:59:41] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=16-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=40-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=38------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=37------------------------------------------------------------------------------------------------------------------------------------------------------------- +[12:59:42] DEBUG POST https://components.atopileapi.com/v0/query + { + "queries": [ + { + "package": { + "type": "EnumSet", + "data": { + "elements": [ + { + "name": "R0805" + } + ], + "enum": { + "name": "BackendPackage", + "values": { + "R01005": "R01005", + "R0201": "R0201", + "R0402": "R0402", + "R0603": "R0603", + "R0805": "R0805", + "R1206": "R1206", + "R1210": "R1210", + "R1808": "R1808", + "R1812": "R1812", + "R1825": "R1825", + "R2220": "R2220", + "R2225": "R2225", + "R3640": "R3640", + "C01005": "C01005", + "C0201": "C0201", + "C0402": "C0402", + "C0603": "C0603", + "C0805": "C0805", + "C1206": "C1206", + "C1210": "C1210", + "C1808": "C1808", + "C1812": "C1812", + "C1825": "C1825", + "C2220": "C2220", + "C2225": "C2225", + "C3640": "C3640", + "L01005": "L01005", + "L0201": "L0201", + "L0402": "L0402", + "L0603": "L0603", + "L0805": "L0805", + "L1206": "L1206", + "L1210": "L1210", + "L1808": "L1808", + "L1812": "L1812", + "L1825": "L1825", + "L2220": "L2220", + "L2225": "L2225", + "L3640": "L3640", + "SMD,4x4mm": "SMD,4x4mm", + "SMD,6x6mm": "SMD,6x6mm", + "SMD,5x5mm": "SMD,5x5mm", + "SMD,3x3mm": "SMD,3x3mm", + "SMD,8x8mm": "SMD,8x8mm", + "SMD,12x12mm": "SMD,12x12mm", + "SMD,12.5x12.5mm": "SMD,12.5x12.5mm", + "SMD,7.8x7mm": "SMD,7.8x7mm", + "SMD,4.5x4mm": "SMD,4.5x4mm", + "SMD,11.5x10mm": "SMD,11.5x10mm", + "SMD,6.6x7mm": "SMD,6.6x7mm", + "SMD,7x6.6mm": "SMD,7x6.6mm", + "SMD,5.8x5.2mm": "SMD,5.8x5.2mm", + "SMD,6.6x7.3mm": "SMD,6.6x7.3mm", + "SMD,3.5x3mm": "SMD,3.5x3mm", + "SMD,7.3x7.3mm": "SMD,7.3x7.3mm", + "SMD,6.6x7.1mm": "SMD,6.6x7.1mm", + "SMD,7x7mm": "SMD,7x7mm", + "SMD,5.4x5.2mm": "SMD,5.4x5.2mm", + "SMD,6.7x6.7mm": "SMD,6.7x6.7mm", + "SMD,11x10mm": "SMD,11x10mm", + "SMD,10x11mm": "SMD,10x11mm", + "SMD,5.2x5.8mm": "SMD,5.2x5.8mm", + "SMD,4.4x4.2mm": "SMD,4.4x4.2mm", + "SMD,13.8x12.6mm": "SMD,13.8x12.6mm", + "SMD,10.1x10.1mm": "SMD,10.1x10.1mm", + "SMD,13.5x12.6mm": "SMD,13.5x12.6mm", + "SMD,4.7x4.7mm": "SMD,4.7x4.7mm", + "SMD,12.3x12.3mm": "SMD,12.3x12.3mm", + "SMD,12.6x13.5mm": "SMD,12.6x13.5mm", + "SMD,2.8x2.9mm": "SMD,2.8x2.9mm", + "SMD,7.3x6.6mm": "SMD,7.3x6.6mm", + "SMD,2.5x2mm": "SMD,2.5x2mm", + "SMD,4.9x4.9mm": "SMD,4.9x4.9mm", + "SMD,10.2x10mm": "SMD,10.2x10mm", + "SMD,7.1x6.6mm": "SMD,7.1x6.6mm", + "SMD,10x10mm": "SMD,10x10mm", + "SMD,5.7x5.7mm": "SMD,5.7x5.7mm", + "SMD,4.1x4.1mm": "SMD,4.1x4.1mm", + "SMD,4.1x4.5mm": "SMD,4.1x4.5mm", + "SMD,7x7.8mm": "SMD,7x7.8mm", + "SMD,10x9mm": "SMD,10x9mm", + "SMD,0.6x1.2mm": "SMD,0.6x1.2mm", + "SMD,6.5x6.9mm": "SMD,6.5x6.9mm", + "SMD,1.6x2mm": "SMD,1.6x2mm", + "SMD,2x2.5mm": "SMD,2x2.5mm", + "SMD,7.1x6.5mm": "SMD,7.1x6.5mm", + "SMD,8x8.5mm": "SMD,8x8.5mm", + "SMD,4.5x4.1mm": "SMD,4.5x4.1mm", + "SMD,4.2x4.4mm": "SMD,4.2x4.4mm", + "SMD,10.4x10.3mm": "SMD,10.4x10.3mm", + "SMD,10x11.5mm": "SMD,10x11.5mm", + "SMD,13.5x12.8mm": "SMD,13.5x12.8mm", + "SMD,17.2x17.2mm": "SMD,17.2x17.2mm", + "SMD,5.2x5.4mm": "SMD,5.2x5.4mm", + "SMD,11.6x10.1mm": "SMD,11.6x10.1mm", + "SMD,10.5x10.3mm": "SMD,10.5x10.3mm", + "SMD,7.2x6.6mm": "SMD,7.2x6.6mm", + "SMD,10x10.2mm": "SMD,10x10.2mm", + "SMD,7.8x7.8mm": "SMD,7.8x7.8mm", + "SMD,1.7x2.3mm": "SMD,1.7x2.3mm", + "SMD,5.2x5.7mm": "SMD,5.2x5.7mm", + "SMD,2x2mm": "SMD,2x2mm", + "SMD,4.5x5.2mm": "SMD,4.5x5.2mm", + "SMD,9x10mm": "SMD,9x10mm", + "SMD,2.5x2.9mm": "SMD,2.5x2.9mm", + "SMD,4.6x4.1mm": "SMD,4.6x4.1mm", + "SMD,7.5x7.5mm": "SMD,7.5x7.5mm", + "SMD,5.5x5.2mm": "SMD,5.5x5.2mm", + "SMD,6.4x6.6mm": "SMD,6.4x6.6mm", + "SMD,12.5x13.5mm": "SMD,12.5x13.5mm", + "SMD,10.7x10mm": "SMD,10.7x10mm", + "SMD,5.5x5.3mm": "SMD,5.5x5.3mm", + "SMD,10.1x11.6mm": "SMD,10.1x11.6mm", + "SMD,10.3x10.5mm": "SMD,10.3x10.5mm", + "SMD,3.2x3mm": "SMD,3.2x3mm", + "SMD,6.6x6.4mm": "SMD,6.6x6.4mm", + "SMD,1.2x0.6mm": "SMD,1.2x0.6mm", + "SMD,1.2x1.8mm": "SMD,1.2x1.8mm", + "SMD,5x5.2mm": "SMD,5x5.2mm", + "SMD,8.3x8.3mm": "SMD,8.3x8.3mm", + "SMD,10.2x10.8mm": "SMD,10.2x10.8mm", + "SMD,2.5x3.2mm": "SMD,2.5x3.2mm", + "SMD,4x4.5mm": "SMD,4x4.5mm", + "SMD,8.5x8mm": "SMD,8.5x8mm", + "SMD,3.5x3.2mm": "SMD,3.5x3.2mm", + "SMD,12.9x13.2mm": "SMD,12.9x13.2mm", + "SMD,8.8x8.2mm": "SMD,8.8x8.2mm", + "SMD,4.1x4.4mm": "SMD,4.1x4.4mm", + "SMD,10.8x10mm": "SMD,10.8x10mm", + "SMD,10.5x10mm": "SMD,10.5x10mm", + "SMD,1.1x1.8mm": "SMD,1.1x1.8mm", + "SMD,7.5x7mm": "SMD,7.5x7mm", + "SMD,3.8x3.8mm": "SMD,3.8x3.8mm", + "SMD,1.6x2.2mm": "SMD,1.6x2.2mm", + "SMD,12.2x12.2mm": "SMD,12.2x12.2mm", + "SMD,4.8x4.8mm": "SMD,4.8x4.8mm", + "SMD,5.7x5.4mm": "SMD,5.7x5.4mm", + "SMD,15.5x16.5mm": "SMD,15.5x16.5mm", + "SMD,8.2x8.8mm": "SMD,8.2x8.8mm", + "SMD,10x14mm": "SMD,10x14mm", + "SMD,5.1x5.4mm": "SMD,5.1x5.4mm", + "SMD,16.5x15.5mm": "SMD,16.5x15.5mm", + "SMD,2.1x3mm": "SMD,2.1x3mm", + "SMD,10x11.6mm": "SMD,10x11.6mm", + "SMD,3.2x4mm": "SMD,3.2x4mm", + "SMD,7.2x7.9mm": "SMD,7.2x7.9mm", + "SMD,5.8x5.8mm": "SMD,5.8x5.8mm", + "SMD,6.6x7.4mm": "SMD,6.6x7.4mm", + "SMD,12.7x12.7mm": "SMD,12.7x12.7mm", + "SMD,1.2x2mm": "SMD,1.2x2mm", + "SMD,1x1.7mm": "SMD,1x1.7mm", + "SMD,4.4x4.1mm": "SMD,4.4x4.1mm", + "SMD,4.2x4.2mm": "SMD,4.2x4.2mm" + } + } + } + }, + "qty": 1, + "endpoint": "resistors", + "resistance": { + "type": "Quantity_Interval_Disjoint", + "data": { + "intervals": { + "type": "Numeric_Interval_Disjoint", + "data": { + "intervals": [ + { + "type": "Numeric_Interval", + "data": { + "min": 950.0, + "max": 1050.0 + } + } + ] + } + }, + "unit": "kiloohm" + } + }, + "max_power": null, + "max_voltage": null + } + ] + } + DEBUG Downloading API data C17513 +[12:59:43] DEBUG GET https://components.atopileapi.com/v0/component/lcsc/17513 + DEBUG Crawling datasheet for C17513 +[12:59:44] DEBUG { + 0: { + 0: + } + } + INFO Picking 1 independent groups: { + 0: + } + DEBUG Attached component C17513 to module rx_protection_resistor: + {'resistance': {'type': 'Quantity_Interval_Disjoint', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 990.0000002235174, 'max': 1009.9999997764826}}]}}, 'unit': 'ohm'}}, 'max_power': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 0.125, 'max': 0.125}}]}}, 'unit': 'watt'}}, + 'max_voltage': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 150.0, 'max': 150.0}}]}}, 'unit': 'volt'}}} + ---> + max_power: rx_protection_resistor.max_power + max_voltage: rx_protection_resistor.max_voltage + resistance: rx_protection_resistor.resistance + INFO Slow-picked parts in 2.91s + INFO Picked complete: picked 1 parts + INFO Verify design + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=19-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=46-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=44------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=43------------------------------------------------------------------------------------------------------------------------------------------------------------- diff --git a/build/logs/archive/2025-09-27_12-59-38/default/picker.error.log b/build/logs/archive/2025-09-27_12-59-38/default/picker.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/picker.info.log b/build/logs/archive/2025-09-27_12-59-38/default/picker.info.log new file mode 100644 index 0000000..8121460 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/picker.info.log @@ -0,0 +1,11 @@ +[12:59:41] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel +[12:59:44] INFO Picking 1 independent groups: { + 0: + } + INFO Slow-picked parts in 2.91s + INFO Picked complete: picked 1 parts + INFO Verify design diff --git a/build/logs/archive/2025-09-27_12-59-38/default/picker.warning.log b/build/logs/archive/2025-09-27_12-59-38/default/picker.warning.log new file mode 100644 index 0000000..f3b98de --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/picker.warning.log @@ -0,0 +1,3 @@ +[12:59:41] WARNING No pickers for { + 0: + } diff --git a/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.debug.log b/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.debug.log new file mode 100644 index 0000000..164f7bc --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.debug.log @@ -0,0 +1,8 @@ +[12:59:40] INFO Running design checks for stage POST_DESIGN + DEBUG Running post-design check `needs_erc_check` for `runtime_anon[9]` + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.error.log b/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.info.log b/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.info.log new file mode 100644 index 0000000..8c12ff6 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.info.log @@ -0,0 +1,7 @@ +[12:59:40] INFO Running design checks for stage POST_DESIGN + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.warning.log b/build/logs/archive/2025-09-27_12-59-38/default/post-design-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.debug.log b/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.debug.log new file mode 100644 index 0000000..b511205 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.debug.log @@ -0,0 +1,3 @@ +[12:59:44] INFO Running checks + INFO Running design checks for stage POST_SOLVE + DEBUG Running post-solve check `needs_erc_check` for `runtime_anon[9]` diff --git a/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.error.log b/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.info.log b/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.info.log new file mode 100644 index 0000000..a225461 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.info.log @@ -0,0 +1,2 @@ +[12:59:44] INFO Running checks + INFO Running design checks for stage POST_SOLVE diff --git a/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.warning.log b/build/logs/archive/2025-09-27_12-59-38/default/post-solve-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.debug.log b/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.debug.log new file mode 100644 index 0000000..83f1963 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.debug.log @@ -0,0 +1,9 @@ +[12:59:40] INFO Resolving bus parameters + DEBUG  Timings  + ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━┳━━━━━━┓ + ┃ Category  ┃  Value ┃ Unit ┃ + ┡━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━╇━━━━━━┩ + │ get parameter connections │ 180.98 │ µs  │ + │ merge parameters  │ 783.43 │ µs  │ + └───────────────────────────┴────────┴──────┘ + diff --git a/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.error.log b/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.info.log b/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.info.log new file mode 100644 index 0000000..376c21c --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.info.log @@ -0,0 +1 @@ +[12:59:40] INFO Resolving bus parameters diff --git a/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.warning.log b/build/logs/archive/2025-09-27_12-59-38/default/prepare-build.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/prepare-nets.debug.log b/build/logs/archive/2025-09-27_12-59-38/default/prepare-nets.debug.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/prepare-nets.error.log b/build/logs/archive/2025-09-27_12-59-38/default/prepare-nets.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/prepare-nets.info.log b/build/logs/archive/2025-09-27_12-59-38/default/prepare-nets.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/prepare-nets.warning.log b/build/logs/archive/2025-09-27_12-59-38/default/prepare-nets.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.debug.log b/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.debug.log new file mode 100644 index 0000000..9daf4e9 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.debug.log @@ -0,0 +1 @@ +[12:59:44] INFO Adding `MountingHole:MountingHole_2.2mm_M2_Pad` as `m2_with_pad` (H3) diff --git a/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.error.log b/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.info.log b/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.info.log new file mode 100644 index 0000000..9daf4e9 --- /dev/null +++ b/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.info.log @@ -0,0 +1 @@ +[12:59:44] INFO Adding `MountingHole:MountingHole_2.2mm_M2_Pad` as `m2_with_pad` (H3) diff --git a/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.warning.log b/build/logs/archive/2025-09-27_12-59-38/default/update-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/init-default.debug.log b/build/logs/archive/2025-09-27_13-01-23/default/init-default.debug.log new file mode 100644 index 0000000..6f7e3d9 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/init-default.debug.log @@ -0,0 +1,8 @@ +[13:01:26] DEBUG Assignment: power_5v.voltage [power_5v.voltage] := [4.947V, 5.253V] + DEBUG Constraining power_5v.voltage to [4.947V, 5.253V] + DEBUG Assignment: power_filter_cap.capacitance [power_filter_cap.capacitance] := [376µF, 564µF] + DEBUG Constraining power_filter_cap.capacitance to [376µF, 564µF] + DEBUG Assignment: power_filter_cap.voltage [power_filter_cap.voltage] := [10V] + DEBUG Constraining power_filter_cap.voltage to [10V] + DEBUG Assignment: rx_protection_resistor.resistance [rx_protection_resistor.resistance] := [1kΩ ± 5.00%] + DEBUG Constraining rx_protection_resistor.resistance to [1kΩ ± 5.00%] diff --git a/build/logs/archive/2025-09-27_13-01-23/default/init-default.error.log b/build/logs/archive/2025-09-27_13-01-23/default/init-default.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/init-default.info.log b/build/logs/archive/2025-09-27_13-01-23/default/init-default.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/init-default.warning.log b/build/logs/archive/2025-09-27_13-01-23/default/init-default.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.debug.log b/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.debug.log new file mode 100644 index 0000000..de990b4 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.debug.log @@ -0,0 +1 @@ +[13:01:26] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.error.log b/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.info.log b/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.info.log new file mode 100644 index 0000000..de990b4 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.info.log @@ -0,0 +1 @@ +[13:01:26] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.warning.log b/build/logs/archive/2025-09-27_13-01-23/default/load-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/picker.debug.log b/build/logs/archive/2025-09-27_13-01-23/default/picker.debug.log new file mode 100644 index 0000000..e554445 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/picker.debug.log @@ -0,0 +1,253 @@ +[13:01:27] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=16-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=40-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=38------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=37------------------------------------------------------------------------------------------------------------------------------------------------------------- +[13:01:28] DEBUG POST https://components.atopileapi.com/v0/query + { + "queries": [ + { + "package": { + "type": "EnumSet", + "data": { + "elements": [ + { + "name": "R0805" + } + ], + "enum": { + "name": "BackendPackage", + "values": { + "R01005": "R01005", + "R0201": "R0201", + "R0402": "R0402", + "R0603": "R0603", + "R0805": "R0805", + "R1206": "R1206", + "R1210": "R1210", + "R1808": "R1808", + "R1812": "R1812", + "R1825": "R1825", + "R2220": "R2220", + "R2225": "R2225", + "R3640": "R3640", + "C01005": "C01005", + "C0201": "C0201", + "C0402": "C0402", + "C0603": "C0603", + "C0805": "C0805", + "C1206": "C1206", + "C1210": "C1210", + "C1808": "C1808", + "C1812": "C1812", + "C1825": "C1825", + "C2220": "C2220", + "C2225": "C2225", + "C3640": "C3640", + "L01005": "L01005", + "L0201": "L0201", + "L0402": "L0402", + "L0603": "L0603", + "L0805": "L0805", + "L1206": "L1206", + "L1210": "L1210", + "L1808": "L1808", + "L1812": "L1812", + "L1825": "L1825", + "L2220": "L2220", + "L2225": "L2225", + "L3640": "L3640", + "SMD,4x4mm": "SMD,4x4mm", + "SMD,6x6mm": "SMD,6x6mm", + "SMD,5x5mm": "SMD,5x5mm", + "SMD,3x3mm": "SMD,3x3mm", + "SMD,8x8mm": "SMD,8x8mm", + "SMD,12x12mm": "SMD,12x12mm", + "SMD,12.5x12.5mm": "SMD,12.5x12.5mm", + "SMD,7.8x7mm": "SMD,7.8x7mm", + "SMD,4.5x4mm": "SMD,4.5x4mm", + "SMD,11.5x10mm": "SMD,11.5x10mm", + "SMD,6.6x7mm": "SMD,6.6x7mm", + "SMD,7x6.6mm": "SMD,7x6.6mm", + "SMD,5.8x5.2mm": "SMD,5.8x5.2mm", + "SMD,6.6x7.3mm": "SMD,6.6x7.3mm", + "SMD,3.5x3mm": "SMD,3.5x3mm", + "SMD,7.3x7.3mm": "SMD,7.3x7.3mm", + "SMD,6.6x7.1mm": "SMD,6.6x7.1mm", + "SMD,7x7mm": "SMD,7x7mm", + "SMD,5.4x5.2mm": "SMD,5.4x5.2mm", + "SMD,6.7x6.7mm": "SMD,6.7x6.7mm", + "SMD,11x10mm": "SMD,11x10mm", + "SMD,10x11mm": "SMD,10x11mm", + "SMD,5.2x5.8mm": "SMD,5.2x5.8mm", + "SMD,4.4x4.2mm": "SMD,4.4x4.2mm", + "SMD,13.8x12.6mm": "SMD,13.8x12.6mm", + "SMD,10.1x10.1mm": "SMD,10.1x10.1mm", + "SMD,13.5x12.6mm": "SMD,13.5x12.6mm", + "SMD,4.7x4.7mm": "SMD,4.7x4.7mm", + "SMD,12.3x12.3mm": "SMD,12.3x12.3mm", + "SMD,12.6x13.5mm": "SMD,12.6x13.5mm", + "SMD,2.8x2.9mm": "SMD,2.8x2.9mm", + "SMD,7.3x6.6mm": "SMD,7.3x6.6mm", + "SMD,2.5x2mm": "SMD,2.5x2mm", + "SMD,4.9x4.9mm": "SMD,4.9x4.9mm", + "SMD,10.2x10mm": "SMD,10.2x10mm", + "SMD,7.1x6.6mm": "SMD,7.1x6.6mm", + "SMD,10x10mm": "SMD,10x10mm", + "SMD,5.7x5.7mm": "SMD,5.7x5.7mm", + "SMD,4.1x4.1mm": "SMD,4.1x4.1mm", + "SMD,4.1x4.5mm": "SMD,4.1x4.5mm", + "SMD,7x7.8mm": "SMD,7x7.8mm", + "SMD,10x9mm": "SMD,10x9mm", + "SMD,0.6x1.2mm": "SMD,0.6x1.2mm", + "SMD,6.5x6.9mm": "SMD,6.5x6.9mm", + "SMD,1.6x2mm": "SMD,1.6x2mm", + "SMD,2x2.5mm": "SMD,2x2.5mm", + "SMD,7.1x6.5mm": "SMD,7.1x6.5mm", + "SMD,8x8.5mm": "SMD,8x8.5mm", + "SMD,4.5x4.1mm": "SMD,4.5x4.1mm", + "SMD,4.2x4.4mm": "SMD,4.2x4.4mm", + "SMD,10.4x10.3mm": "SMD,10.4x10.3mm", + "SMD,10x11.5mm": "SMD,10x11.5mm", + "SMD,13.5x12.8mm": "SMD,13.5x12.8mm", + "SMD,17.2x17.2mm": "SMD,17.2x17.2mm", + "SMD,5.2x5.4mm": "SMD,5.2x5.4mm", + "SMD,11.6x10.1mm": "SMD,11.6x10.1mm", + "SMD,10.5x10.3mm": "SMD,10.5x10.3mm", + "SMD,7.2x6.6mm": "SMD,7.2x6.6mm", + "SMD,10x10.2mm": "SMD,10x10.2mm", + "SMD,7.8x7.8mm": "SMD,7.8x7.8mm", + "SMD,1.7x2.3mm": "SMD,1.7x2.3mm", + "SMD,5.2x5.7mm": "SMD,5.2x5.7mm", + "SMD,2x2mm": "SMD,2x2mm", + "SMD,4.5x5.2mm": "SMD,4.5x5.2mm", + "SMD,9x10mm": "SMD,9x10mm", + "SMD,2.5x2.9mm": "SMD,2.5x2.9mm", + "SMD,4.6x4.1mm": "SMD,4.6x4.1mm", + "SMD,7.5x7.5mm": "SMD,7.5x7.5mm", + "SMD,5.5x5.2mm": "SMD,5.5x5.2mm", + "SMD,6.4x6.6mm": "SMD,6.4x6.6mm", + "SMD,12.5x13.5mm": "SMD,12.5x13.5mm", + "SMD,10.7x10mm": "SMD,10.7x10mm", + "SMD,5.5x5.3mm": "SMD,5.5x5.3mm", + "SMD,10.1x11.6mm": "SMD,10.1x11.6mm", + "SMD,10.3x10.5mm": "SMD,10.3x10.5mm", + "SMD,3.2x3mm": "SMD,3.2x3mm", + "SMD,6.6x6.4mm": "SMD,6.6x6.4mm", + "SMD,1.2x0.6mm": "SMD,1.2x0.6mm", + "SMD,1.2x1.8mm": "SMD,1.2x1.8mm", + "SMD,5x5.2mm": "SMD,5x5.2mm", + "SMD,8.3x8.3mm": "SMD,8.3x8.3mm", + "SMD,10.2x10.8mm": "SMD,10.2x10.8mm", + "SMD,2.5x3.2mm": "SMD,2.5x3.2mm", + "SMD,4x4.5mm": "SMD,4x4.5mm", + "SMD,8.5x8mm": "SMD,8.5x8mm", + "SMD,3.5x3.2mm": "SMD,3.5x3.2mm", + "SMD,12.9x13.2mm": "SMD,12.9x13.2mm", + "SMD,8.8x8.2mm": "SMD,8.8x8.2mm", + "SMD,4.1x4.4mm": "SMD,4.1x4.4mm", + "SMD,10.8x10mm": "SMD,10.8x10mm", + "SMD,10.5x10mm": "SMD,10.5x10mm", + "SMD,1.1x1.8mm": "SMD,1.1x1.8mm", + "SMD,7.5x7mm": "SMD,7.5x7mm", + "SMD,3.8x3.8mm": "SMD,3.8x3.8mm", + "SMD,1.6x2.2mm": "SMD,1.6x2.2mm", + "SMD,12.2x12.2mm": "SMD,12.2x12.2mm", + "SMD,4.8x4.8mm": "SMD,4.8x4.8mm", + "SMD,5.7x5.4mm": "SMD,5.7x5.4mm", + "SMD,15.5x16.5mm": "SMD,15.5x16.5mm", + "SMD,8.2x8.8mm": "SMD,8.2x8.8mm", + "SMD,10x14mm": "SMD,10x14mm", + "SMD,5.1x5.4mm": "SMD,5.1x5.4mm", + "SMD,16.5x15.5mm": "SMD,16.5x15.5mm", + "SMD,2.1x3mm": "SMD,2.1x3mm", + "SMD,10x11.6mm": "SMD,10x11.6mm", + "SMD,3.2x4mm": "SMD,3.2x4mm", + "SMD,7.2x7.9mm": "SMD,7.2x7.9mm", + "SMD,5.8x5.8mm": "SMD,5.8x5.8mm", + "SMD,6.6x7.4mm": "SMD,6.6x7.4mm", + "SMD,12.7x12.7mm": "SMD,12.7x12.7mm", + "SMD,1.2x2mm": "SMD,1.2x2mm", + "SMD,1x1.7mm": "SMD,1x1.7mm", + "SMD,4.4x4.1mm": "SMD,4.4x4.1mm", + "SMD,4.2x4.2mm": "SMD,4.2x4.2mm" + } + } + } + }, + "qty": 1, + "endpoint": "resistors", + "resistance": { + "type": "Quantity_Interval_Disjoint", + "data": { + "intervals": { + "type": "Numeric_Interval_Disjoint", + "data": { + "intervals": [ + { + "type": "Numeric_Interval", + "data": { + "min": 950.0, + "max": 1050.0 + } + } + ] + } + }, + "unit": "kiloohm" + } + }, + "max_power": null, + "max_voltage": null + } + ] + } + DEBUG Downloading API data C17513 +[13:01:29] DEBUG GET https://components.atopileapi.com/v0/component/lcsc/17513 + DEBUG Crawling datasheet for C17513 +[13:01:30] DEBUG { + 0: { + 0: + } + } + INFO Picking 1 independent groups: { + 0: + } + DEBUG Attached component C17513 to module rx_protection_resistor: + {'resistance': {'type': 'Quantity_Interval_Disjoint', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 990.0000002235174, 'max': 1009.9999997764826}}]}}, 'unit': 'ohm'}}, 'max_power': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 0.125, 'max': 0.125}}]}}, 'unit': 'watt'}}, + 'max_voltage': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 150.0, 'max': 150.0}}]}}, 'unit': 'volt'}}} + ---> + max_power: rx_protection_resistor.max_power + max_voltage: rx_protection_resistor.max_voltage + resistance: rx_protection_resistor.resistance + INFO Slow-picked parts in 3s + INFO Picked complete: picked 1 parts + INFO Verify design + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=19-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=46-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=44------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=43------------------------------------------------------------------------------------------------------------------------------------------------------------- diff --git a/build/logs/archive/2025-09-27_13-01-23/default/picker.error.log b/build/logs/archive/2025-09-27_13-01-23/default/picker.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/picker.info.log b/build/logs/archive/2025-09-27_13-01-23/default/picker.info.log new file mode 100644 index 0000000..7e1ff20 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/picker.info.log @@ -0,0 +1,11 @@ +[13:01:27] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel +[13:01:30] INFO Picking 1 independent groups: { + 0: + } + INFO Slow-picked parts in 3s + INFO Picked complete: picked 1 parts + INFO Verify design diff --git a/build/logs/archive/2025-09-27_13-01-23/default/picker.warning.log b/build/logs/archive/2025-09-27_13-01-23/default/picker.warning.log new file mode 100644 index 0000000..373fb43 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/picker.warning.log @@ -0,0 +1,3 @@ +[13:01:27] WARNING No pickers for { + 0: + } diff --git a/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.debug.log b/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.debug.log new file mode 100644 index 0000000..0a587a4 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.debug.log @@ -0,0 +1,8 @@ +[13:01:26] INFO Running design checks for stage POST_DESIGN + DEBUG Running post-design check `needs_erc_check` for `runtime_anon[9]` + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.error.log b/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.info.log b/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.info.log new file mode 100644 index 0000000..9210e2f --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.info.log @@ -0,0 +1,7 @@ +[13:01:26] INFO Running design checks for stage POST_DESIGN + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.warning.log b/build/logs/archive/2025-09-27_13-01-23/default/post-design-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.debug.log b/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.debug.log new file mode 100644 index 0000000..7562de3 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.debug.log @@ -0,0 +1,3 @@ +[13:01:30] INFO Running checks + INFO Running design checks for stage POST_SOLVE + DEBUG Running post-solve check `needs_erc_check` for `runtime_anon[9]` diff --git a/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.error.log b/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.info.log b/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.info.log new file mode 100644 index 0000000..496584a --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.info.log @@ -0,0 +1,2 @@ +[13:01:30] INFO Running checks + INFO Running design checks for stage POST_SOLVE diff --git a/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.warning.log b/build/logs/archive/2025-09-27_13-01-23/default/post-solve-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.debug.log b/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.debug.log new file mode 100644 index 0000000..b6255c4 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.debug.log @@ -0,0 +1,9 @@ +[13:01:26] INFO Resolving bus parameters + DEBUG  Timings  + ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━┳━━━━━━┓ + ┃ Category  ┃  Value ┃ Unit ┃ + ┡━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━╇━━━━━━┩ + │ get parameter connections │ 132.28 │ µs  │ + │ merge parameters  │ 759.93 │ µs  │ + └───────────────────────────┴────────┴──────┘ + diff --git a/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.error.log b/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.info.log b/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.info.log new file mode 100644 index 0000000..accf42f --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.info.log @@ -0,0 +1 @@ +[13:01:26] INFO Resolving bus parameters diff --git a/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.warning.log b/build/logs/archive/2025-09-27_13-01-23/default/prepare-build.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/prepare-nets.debug.log b/build/logs/archive/2025-09-27_13-01-23/default/prepare-nets.debug.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/prepare-nets.error.log b/build/logs/archive/2025-09-27_13-01-23/default/prepare-nets.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/prepare-nets.info.log b/build/logs/archive/2025-09-27_13-01-23/default/prepare-nets.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/prepare-nets.warning.log b/build/logs/archive/2025-09-27_13-01-23/default/prepare-nets.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.debug.log b/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.debug.log new file mode 100644 index 0000000..c4f7ad3 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.debug.log @@ -0,0 +1 @@ +[13:01:30] INFO Adding `MountingHole:MountingHole_2.2mm_M2_Pad` as `m2_with_pad` (H3) diff --git a/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.error.log b/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.info.log b/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.info.log new file mode 100644 index 0000000..c4f7ad3 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.info.log @@ -0,0 +1 @@ +[13:01:30] INFO Adding `MountingHole:MountingHole_2.2mm_M2_Pad` as `m2_with_pad` (H3) diff --git a/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.warning.log b/build/logs/archive/2025-09-27_13-01-23/default/update-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/init-default.debug.log b/build/logs/archive/2025-09-27_13-02-07/default/init-default.debug.log new file mode 100644 index 0000000..321622e --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/init-default.debug.log @@ -0,0 +1,8 @@ +[13:02:09] DEBUG Assignment: power_5v.voltage [power_5v.voltage] := [4.947V, 5.253V] + DEBUG Constraining power_5v.voltage to [4.947V, 5.253V] + DEBUG Assignment: power_filter_cap.capacitance [power_filter_cap.capacitance] := [376µF, 564µF] + DEBUG Constraining power_filter_cap.capacitance to [376µF, 564µF] + DEBUG Assignment: power_filter_cap.voltage [power_filter_cap.voltage] := [10V] + DEBUG Constraining power_filter_cap.voltage to [10V] + DEBUG Assignment: rx_protection_resistor.resistance [rx_protection_resistor.resistance] := [1kΩ ± 5.00%] + DEBUG Constraining rx_protection_resistor.resistance to [1kΩ ± 5.00%] diff --git a/build/logs/archive/2025-09-27_13-02-07/default/init-default.error.log b/build/logs/archive/2025-09-27_13-02-07/default/init-default.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/init-default.info.log b/build/logs/archive/2025-09-27_13-02-07/default/init-default.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/init-default.warning.log b/build/logs/archive/2025-09-27_13-02-07/default/init-default.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.debug.log b/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.debug.log new file mode 100644 index 0000000..0a009a3 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.debug.log @@ -0,0 +1 @@ +[13:02:09] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.error.log b/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.info.log b/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.info.log new file mode 100644 index 0000000..0a009a3 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.info.log @@ -0,0 +1 @@ +[13:02:09] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayer-carrier-board/layout/default/default.kicad_pcb diff --git a/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.warning.log b/build/logs/archive/2025-09-27_13-02-07/default/load-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/picker.debug.log b/build/logs/archive/2025-09-27_13-02-07/default/picker.debug.log new file mode 100644 index 0000000..393be89 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/picker.debug.log @@ -0,0 +1,253 @@ +[13:02:10] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=16-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=40-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=38------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=37------------------------------------------------------------------------------------------------------------------------------------------------------------- +[13:02:11] DEBUG POST https://components.atopileapi.com/v0/query + { + "queries": [ + { + "package": { + "type": "EnumSet", + "data": { + "elements": [ + { + "name": "R0805" + } + ], + "enum": { + "name": "BackendPackage", + "values": { + "R01005": "R01005", + "R0201": "R0201", + "R0402": "R0402", + "R0603": "R0603", + "R0805": "R0805", + "R1206": "R1206", + "R1210": "R1210", + "R1808": "R1808", + "R1812": "R1812", + "R1825": "R1825", + "R2220": "R2220", + "R2225": "R2225", + "R3640": "R3640", + "C01005": "C01005", + "C0201": "C0201", + "C0402": "C0402", + "C0603": "C0603", + "C0805": "C0805", + "C1206": "C1206", + "C1210": "C1210", + "C1808": "C1808", + "C1812": "C1812", + "C1825": "C1825", + "C2220": "C2220", + "C2225": "C2225", + "C3640": "C3640", + "L01005": "L01005", + "L0201": "L0201", + "L0402": "L0402", + "L0603": "L0603", + "L0805": "L0805", + "L1206": "L1206", + "L1210": "L1210", + "L1808": "L1808", + "L1812": "L1812", + "L1825": "L1825", + "L2220": "L2220", + "L2225": "L2225", + "L3640": "L3640", + "SMD,4x4mm": "SMD,4x4mm", + "SMD,6x6mm": "SMD,6x6mm", + "SMD,5x5mm": "SMD,5x5mm", + "SMD,3x3mm": "SMD,3x3mm", + "SMD,8x8mm": "SMD,8x8mm", + "SMD,12x12mm": "SMD,12x12mm", + "SMD,12.5x12.5mm": "SMD,12.5x12.5mm", + "SMD,7.8x7mm": "SMD,7.8x7mm", + "SMD,4.5x4mm": "SMD,4.5x4mm", + "SMD,11.5x10mm": "SMD,11.5x10mm", + "SMD,6.6x7mm": "SMD,6.6x7mm", + "SMD,7x6.6mm": "SMD,7x6.6mm", + "SMD,5.8x5.2mm": "SMD,5.8x5.2mm", + "SMD,6.6x7.3mm": "SMD,6.6x7.3mm", + "SMD,3.5x3mm": "SMD,3.5x3mm", + "SMD,7.3x7.3mm": "SMD,7.3x7.3mm", + "SMD,6.6x7.1mm": "SMD,6.6x7.1mm", + "SMD,7x7mm": "SMD,7x7mm", + "SMD,5.4x5.2mm": "SMD,5.4x5.2mm", + "SMD,6.7x6.7mm": "SMD,6.7x6.7mm", + "SMD,11x10mm": "SMD,11x10mm", + "SMD,10x11mm": "SMD,10x11mm", + "SMD,5.2x5.8mm": "SMD,5.2x5.8mm", + "SMD,4.4x4.2mm": "SMD,4.4x4.2mm", + "SMD,13.8x12.6mm": "SMD,13.8x12.6mm", + "SMD,10.1x10.1mm": "SMD,10.1x10.1mm", + "SMD,13.5x12.6mm": "SMD,13.5x12.6mm", + "SMD,4.7x4.7mm": "SMD,4.7x4.7mm", + "SMD,12.3x12.3mm": "SMD,12.3x12.3mm", + "SMD,12.6x13.5mm": "SMD,12.6x13.5mm", + "SMD,2.8x2.9mm": "SMD,2.8x2.9mm", + "SMD,7.3x6.6mm": "SMD,7.3x6.6mm", + "SMD,2.5x2mm": "SMD,2.5x2mm", + "SMD,4.9x4.9mm": "SMD,4.9x4.9mm", + "SMD,10.2x10mm": "SMD,10.2x10mm", + "SMD,7.1x6.6mm": "SMD,7.1x6.6mm", + "SMD,10x10mm": "SMD,10x10mm", + "SMD,5.7x5.7mm": "SMD,5.7x5.7mm", + "SMD,4.1x4.1mm": "SMD,4.1x4.1mm", + "SMD,4.1x4.5mm": "SMD,4.1x4.5mm", + "SMD,7x7.8mm": "SMD,7x7.8mm", + "SMD,10x9mm": "SMD,10x9mm", + "SMD,0.6x1.2mm": "SMD,0.6x1.2mm", + "SMD,6.5x6.9mm": "SMD,6.5x6.9mm", + "SMD,1.6x2mm": "SMD,1.6x2mm", + "SMD,2x2.5mm": "SMD,2x2.5mm", + "SMD,7.1x6.5mm": "SMD,7.1x6.5mm", + "SMD,8x8.5mm": "SMD,8x8.5mm", + "SMD,4.5x4.1mm": "SMD,4.5x4.1mm", + "SMD,4.2x4.4mm": "SMD,4.2x4.4mm", + "SMD,10.4x10.3mm": "SMD,10.4x10.3mm", + "SMD,10x11.5mm": "SMD,10x11.5mm", + "SMD,13.5x12.8mm": "SMD,13.5x12.8mm", + "SMD,17.2x17.2mm": "SMD,17.2x17.2mm", + "SMD,5.2x5.4mm": "SMD,5.2x5.4mm", + "SMD,11.6x10.1mm": "SMD,11.6x10.1mm", + "SMD,10.5x10.3mm": "SMD,10.5x10.3mm", + "SMD,7.2x6.6mm": "SMD,7.2x6.6mm", + "SMD,10x10.2mm": "SMD,10x10.2mm", + "SMD,7.8x7.8mm": "SMD,7.8x7.8mm", + "SMD,1.7x2.3mm": "SMD,1.7x2.3mm", + "SMD,5.2x5.7mm": "SMD,5.2x5.7mm", + "SMD,2x2mm": "SMD,2x2mm", + "SMD,4.5x5.2mm": "SMD,4.5x5.2mm", + "SMD,9x10mm": "SMD,9x10mm", + "SMD,2.5x2.9mm": "SMD,2.5x2.9mm", + "SMD,4.6x4.1mm": "SMD,4.6x4.1mm", + "SMD,7.5x7.5mm": "SMD,7.5x7.5mm", + "SMD,5.5x5.2mm": "SMD,5.5x5.2mm", + "SMD,6.4x6.6mm": "SMD,6.4x6.6mm", + "SMD,12.5x13.5mm": "SMD,12.5x13.5mm", + "SMD,10.7x10mm": "SMD,10.7x10mm", + "SMD,5.5x5.3mm": "SMD,5.5x5.3mm", + "SMD,10.1x11.6mm": "SMD,10.1x11.6mm", + "SMD,10.3x10.5mm": "SMD,10.3x10.5mm", + "SMD,3.2x3mm": "SMD,3.2x3mm", + "SMD,6.6x6.4mm": "SMD,6.6x6.4mm", + "SMD,1.2x0.6mm": "SMD,1.2x0.6mm", + "SMD,1.2x1.8mm": "SMD,1.2x1.8mm", + "SMD,5x5.2mm": "SMD,5x5.2mm", + "SMD,8.3x8.3mm": "SMD,8.3x8.3mm", + "SMD,10.2x10.8mm": "SMD,10.2x10.8mm", + "SMD,2.5x3.2mm": "SMD,2.5x3.2mm", + "SMD,4x4.5mm": "SMD,4x4.5mm", + "SMD,8.5x8mm": "SMD,8.5x8mm", + "SMD,3.5x3.2mm": "SMD,3.5x3.2mm", + "SMD,12.9x13.2mm": "SMD,12.9x13.2mm", + "SMD,8.8x8.2mm": "SMD,8.8x8.2mm", + "SMD,4.1x4.4mm": "SMD,4.1x4.4mm", + "SMD,10.8x10mm": "SMD,10.8x10mm", + "SMD,10.5x10mm": "SMD,10.5x10mm", + "SMD,1.1x1.8mm": "SMD,1.1x1.8mm", + "SMD,7.5x7mm": "SMD,7.5x7mm", + "SMD,3.8x3.8mm": "SMD,3.8x3.8mm", + "SMD,1.6x2.2mm": "SMD,1.6x2.2mm", + "SMD,12.2x12.2mm": "SMD,12.2x12.2mm", + "SMD,4.8x4.8mm": "SMD,4.8x4.8mm", + "SMD,5.7x5.4mm": "SMD,5.7x5.4mm", + "SMD,15.5x16.5mm": "SMD,15.5x16.5mm", + "SMD,8.2x8.8mm": "SMD,8.2x8.8mm", + "SMD,10x14mm": "SMD,10x14mm", + "SMD,5.1x5.4mm": "SMD,5.1x5.4mm", + "SMD,16.5x15.5mm": "SMD,16.5x15.5mm", + "SMD,2.1x3mm": "SMD,2.1x3mm", + "SMD,10x11.6mm": "SMD,10x11.6mm", + "SMD,3.2x4mm": "SMD,3.2x4mm", + "SMD,7.2x7.9mm": "SMD,7.2x7.9mm", + "SMD,5.8x5.8mm": "SMD,5.8x5.8mm", + "SMD,6.6x7.4mm": "SMD,6.6x7.4mm", + "SMD,12.7x12.7mm": "SMD,12.7x12.7mm", + "SMD,1.2x2mm": "SMD,1.2x2mm", + "SMD,1x1.7mm": "SMD,1x1.7mm", + "SMD,4.4x4.1mm": "SMD,4.4x4.1mm", + "SMD,4.2x4.2mm": "SMD,4.2x4.2mm" + } + } + } + }, + "qty": 1, + "endpoint": "resistors", + "resistance": { + "type": "Quantity_Interval_Disjoint", + "data": { + "intervals": { + "type": "Numeric_Interval_Disjoint", + "data": { + "intervals": [ + { + "type": "Numeric_Interval", + "data": { + "min": 950.0, + "max": 1050.0 + } + } + ] + } + }, + "unit": "kiloohm" + } + }, + "max_power": null, + "max_voltage": null + } + ] + } + DEBUG Downloading API data C17513 +[13:02:12] DEBUG GET https://components.atopileapi.com/v0/component/lcsc/17513 + DEBUG Crawling datasheet for C17513 +[13:02:13] DEBUG { + 0: { + 0: + } + } + INFO Picking 1 independent groups: { + 0: + } + DEBUG Attached component C17513 to module rx_protection_resistor: + {'resistance': {'type': 'Quantity_Interval_Disjoint', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 990.0000002235174, 'max': 1009.9999997764826}}]}}, 'unit': 'ohm'}}, 'max_power': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 0.125, 'max': 0.125}}]}}, 'unit': 'watt'}}, + 'max_voltage': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 150.0, 'max': 150.0}}]}}, 'unit': 'volt'}}} + ---> + max_power: rx_protection_resistor.max_power + max_voltage: rx_protection_resistor.max_voltage + resistance: rx_protection_resistor.resistance + INFO Slow-picked parts in 2.49s + INFO Picked complete: picked 1 parts + INFO Verify design + DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=19-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1 + DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8 + DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8 + DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=46-------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8 + DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8 + DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8 + DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8 + DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8 + DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8 + DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=44------------------------------------------------------------------------------------------------------------------------------------------------------------- + DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8 + DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=43------------------------------------------------------------------------------------------------------------------------------------------------------------- diff --git a/build/logs/archive/2025-09-27_13-02-07/default/picker.error.log b/build/logs/archive/2025-09-27_13-02-07/default/picker.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/picker.info.log b/build/logs/archive/2025-09-27_13-02-07/default/picker.info.log new file mode 100644 index 0000000..6071948 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/picker.info.log @@ -0,0 +1,11 @@ +[13:02:10] WARNING No pickers for { + 0: + } + INFO Picking 1 modules + INFO Picking 1 modules in parallel +[13:02:13] INFO Picking 1 independent groups: { + 0: + } + INFO Slow-picked parts in 2.49s + INFO Picked complete: picked 1 parts + INFO Verify design diff --git a/build/logs/archive/2025-09-27_13-02-07/default/picker.warning.log b/build/logs/archive/2025-09-27_13-02-07/default/picker.warning.log new file mode 100644 index 0000000..32631c9 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/picker.warning.log @@ -0,0 +1,3 @@ +[13:02:10] WARNING No pickers for { + 0: + } diff --git a/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.debug.log b/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.debug.log new file mode 100644 index 0000000..8312dfd --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.debug.log @@ -0,0 +1,8 @@ +[13:02:09] INFO Running design checks for stage POST_DESIGN + DEBUG Running post-design check `needs_erc_check` for `runtime_anon[9]` + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.error.log b/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.info.log b/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.info.log new file mode 100644 index 0000000..6d0f90f --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.info.log @@ -0,0 +1,7 @@ +[13:02:09] INFO Running design checks for stage POST_DESIGN + INFO Checking graph for ERC violations + INFO Checking 1 Power + INFO Checking for hv/lv shorts + INFO Checking for power source shorts + INFO Checking 0 explicit nets + INFO Checking 1 passives diff --git a/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.warning.log b/build/logs/archive/2025-09-27_13-02-07/default/post-design-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.debug.log b/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.debug.log new file mode 100644 index 0000000..48105be --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.debug.log @@ -0,0 +1,3 @@ +[13:02:13] INFO Running checks + INFO Running design checks for stage POST_SOLVE + DEBUG Running post-solve check `needs_erc_check` for `runtime_anon[9]` diff --git a/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.error.log b/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.info.log b/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.info.log new file mode 100644 index 0000000..26cfa95 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.info.log @@ -0,0 +1,2 @@ +[13:02:13] INFO Running checks + INFO Running design checks for stage POST_SOLVE diff --git a/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.warning.log b/build/logs/archive/2025-09-27_13-02-07/default/post-solve-checks.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.debug.log b/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.debug.log new file mode 100644 index 0000000..fd67431 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.debug.log @@ -0,0 +1,9 @@ +[13:02:09] INFO Resolving bus parameters + DEBUG  Timings  + ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━┳━━━━━━┓ + ┃ Category  ┃  Value ┃ Unit ┃ + ┡━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━╇━━━━━━┩ + │ get parameter connections │ 114.01 │ µs  │ + │ merge parameters  │ 693.16 │ µs  │ + └───────────────────────────┴────────┴──────┘ + diff --git a/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.error.log b/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.info.log b/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.info.log new file mode 100644 index 0000000..40c9c97 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.info.log @@ -0,0 +1 @@ +[13:02:09] INFO Resolving bus parameters diff --git a/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.warning.log b/build/logs/archive/2025-09-27_13-02-07/default/prepare-build.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/prepare-nets.debug.log b/build/logs/archive/2025-09-27_13-02-07/default/prepare-nets.debug.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/prepare-nets.error.log b/build/logs/archive/2025-09-27_13-02-07/default/prepare-nets.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/prepare-nets.info.log b/build/logs/archive/2025-09-27_13-02-07/default/prepare-nets.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/prepare-nets.warning.log b/build/logs/archive/2025-09-27_13-02-07/default/prepare-nets.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.debug.log b/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.debug.log new file mode 100644 index 0000000..d5e6378 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.debug.log @@ -0,0 +1 @@ +[13:02:13] INFO Adding `MountingHole:MountingHole_6.4mm_M6` as `m6_no_pad` (H3) diff --git a/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.error.log b/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.info.log b/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.info.log new file mode 100644 index 0000000..d5e6378 --- /dev/null +++ b/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.info.log @@ -0,0 +1 @@ +[13:02:13] INFO Adding `MountingHole:MountingHole_6.4mm_M6` as `m6_no_pad` (H3) diff --git a/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.warning.log b/build/logs/archive/2025-09-27_13-02-07/default/update-pcb.warning.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-03-13/default/init-default.debug.log b/build/logs/archive/2025-09-27_13-03-13/default/init-default.debug.log new file mode 100644 index 0000000..ba156ac --- /dev/null +++ b/build/logs/archive/2025-09-27_13-03-13/default/init-default.debug.log @@ -0,0 +1,8 @@ +[13:03:15] DEBUG Assignment: power_5v.voltage [power_5v.voltage] := [4.947V, 5.253V] + DEBUG Constraining power_5v.voltage to [4.947V, 5.253V] + DEBUG Assignment: power_filter_cap.capacitance [power_filter_cap.capacitance] := [376µF, 564µF] + DEBUG Constraining power_filter_cap.capacitance to [376µF, 564µF] + DEBUG Assignment: power_filter_cap.voltage [power_filter_cap.voltage] := [10V] + DEBUG Constraining power_filter_cap.voltage to [10V] + DEBUG Assignment: rx_protection_resistor.resistance [rx_protection_resistor.resistance] := [1kΩ ± 5.00%] + DEBUG Constraining rx_protection_resistor.resistance to [1kΩ ± 5.00%] diff --git a/build/logs/archive/2025-09-27_13-03-13/default/init-default.error.log b/build/logs/archive/2025-09-27_13-03-13/default/init-default.error.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-03-13/default/init-default.info.log b/build/logs/archive/2025-09-27_13-03-13/default/init-default.info.log new file mode 100644 index 0000000..e69de29 diff --git a/build/logs/archive/2025-09-27_13-03-13/default/init-default.warning.log b/build/logs/archive/2025-09-27_13-03-13/default/init-default.warning.log new file mode 100644 index 0000000..e69de29