Initial commit
This commit is contained in:
@@ -0,0 +1,32 @@
|
||||
[12:07:10] WARNING Not Implemented Error
|
||||
`exclude_from_bom` is not yet implemented. This should not currently affect your design, however may throw spurious warnings.
|
||||
See: https://github.com/atopile/atopile/issues/755
|
||||
Source: main.ato:78:7
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||||
77
|
||||
❱ 78 module DFPlayerCarrierBoard:
|
||||
79 │ # --- Signals and Power rails ---
|
||||
Code causing the error:
|
||||
Source: main.ato:88:32
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||||
87 │ dfplayer = new DFPlayer_Mini
|
||||
❱ 88 │ dfplayer.exclude_from_bom = True # Exclude from BOM since it's a module
|
||||
89
|
||||
WARNING Not Implemented Error
|
||||
`exclude_from_bom` is not yet implemented. This should not currently affect your design, however may throw spurious warnings.
|
||||
See: https://github.com/atopile/atopile/issues/755
|
||||
Source: main.ato:78:7
|
||||
77
|
||||
❱ 78 module DFPlayerCarrierBoard:
|
||||
79 │ # --- Signals and Power rails ---
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||||
Code causing the error:
|
||||
Source: main.ato:118:35
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||||
117 │ m2_with_pad = new MountingHole<metric_screw_size="M3", pad_type="Pad">
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||||
❱ 118 │ m2_with_pad.exclude_from_bom = True
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||||
119 │ # m6_no_pad = new MountingHole<metric_screw_size="M6", pad_type="NoPad">
|
||||
DEBUG Assignment: power_5v.voltage [power_5v.voltage] := [4.947V, 5.253V]
|
||||
DEBUG Constraining power_5v.voltage to [4.947V, 5.253V]
|
||||
DEBUG Assignment: power_filter_cap.capacitance [power_filter_cap.capacitance] := [376µF, 564µF]
|
||||
DEBUG Constraining power_filter_cap.capacitance to [376µF, 564µF]
|
||||
DEBUG Assignment: power_filter_cap.voltage [power_filter_cap.voltage] := [10V]
|
||||
DEBUG Constraining power_filter_cap.voltage to [10V]
|
||||
DEBUG Assignment: rx_protection_resistor.resistance [rx_protection_resistor.resistance] := [1kΩ ± 5.00%]
|
||||
[12:07:11] DEBUG Constraining rx_protection_resistor.resistance to [1kΩ ± 5.00%]
|
||||
@@ -0,0 +1,24 @@
|
||||
[12:07:10] WARNING Not Implemented Error
|
||||
`exclude_from_bom` is not yet implemented. This should not currently affect your design, however may throw spurious warnings.
|
||||
See: https://github.com/atopile/atopile/issues/755
|
||||
Source: main.ato:78:7
|
||||
77
|
||||
❱ 78 module DFPlayerCarrierBoard:
|
||||
79 │ # --- Signals and Power rails ---
|
||||
Code causing the error:
|
||||
Source: main.ato:88:32
|
||||
87 │ dfplayer = new DFPlayer_Mini
|
||||
❱ 88 │ dfplayer.exclude_from_bom = True # Exclude from BOM since it's a module
|
||||
89
|
||||
WARNING Not Implemented Error
|
||||
`exclude_from_bom` is not yet implemented. This should not currently affect your design, however may throw spurious warnings.
|
||||
See: https://github.com/atopile/atopile/issues/755
|
||||
Source: main.ato:78:7
|
||||
77
|
||||
❱ 78 module DFPlayerCarrierBoard:
|
||||
79 │ # --- Signals and Power rails ---
|
||||
Code causing the error:
|
||||
Source: main.ato:118:35
|
||||
117 │ m2_with_pad = new MountingHole<metric_screw_size="M3", pad_type="Pad">
|
||||
❱ 118 │ m2_with_pad.exclude_from_bom = True
|
||||
119 │ # m6_no_pad = new MountingHole<metric_screw_size="M6", pad_type="NoPad">
|
||||
@@ -0,0 +1,24 @@
|
||||
[12:07:10] WARNING Not Implemented Error
|
||||
`exclude_from_bom` is not yet implemented. This should not currently affect your design, however may throw spurious warnings.
|
||||
See: https://github.com/atopile/atopile/issues/755
|
||||
Source: main.ato:78:7
|
||||
77
|
||||
❱ 78 module DFPlayerCarrierBoard:
|
||||
79 │ # --- Signals and Power rails ---
|
||||
Code causing the error:
|
||||
Source: main.ato:88:32
|
||||
87 │ dfplayer = new DFPlayer_Mini
|
||||
❱ 88 │ dfplayer.exclude_from_bom = True # Exclude from BOM since it's a module
|
||||
89
|
||||
WARNING Not Implemented Error
|
||||
`exclude_from_bom` is not yet implemented. This should not currently affect your design, however may throw spurious warnings.
|
||||
See: https://github.com/atopile/atopile/issues/755
|
||||
Source: main.ato:78:7
|
||||
77
|
||||
❱ 78 module DFPlayerCarrierBoard:
|
||||
79 │ # --- Signals and Power rails ---
|
||||
Code causing the error:
|
||||
Source: main.ato:118:35
|
||||
117 │ m2_with_pad = new MountingHole<metric_screw_size="M3", pad_type="Pad">
|
||||
❱ 118 │ m2_with_pad.exclude_from_bom = True
|
||||
119 │ # m6_no_pad = new MountingHole<metric_screw_size="M6", pad_type="NoPad">
|
||||
@@ -0,0 +1 @@
|
||||
[12:07:11] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayerMB/layout/default/default.kicad_pcb
|
||||
@@ -0,0 +1 @@
|
||||
[12:07:11] INFO Loading KiCad PCB file: /home/martin/proj/DFPlayerMB/layout/default/default.kicad_pcb
|
||||
257
build/logs/archive/2025-09-27_12-07-08/default/picker.debug.log
Normal file
257
build/logs/archive/2025-09-27_12-07-08/default/picker.debug.log
Normal file
@@ -0,0 +1,257 @@
|
||||
[12:07:12] WARNING No pickers for {
|
||||
0: <m2_with_pad|MountingHole>
|
||||
}
|
||||
WARNING No pickers and no footprint for {
|
||||
0: <dfplayer|DFPlayer_Mini>
|
||||
}.
|
||||
ATTENTION: These modules will not appear in netlist or pcb.
|
||||
INFO Picking 1 modules
|
||||
INFO Picking 1 modules in parallel
|
||||
DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=16----------------------------------------------------------------------
|
||||
DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1
|
||||
DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8
|
||||
DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8
|
||||
DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=40----------------------------------------------------------------------
|
||||
DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8
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||||
DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8
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||||
DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=38---------------------------------------------------------------------
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||||
DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8
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||||
DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=37---------------------------------------------------------------------
|
||||
[12:07:14] DEBUG POST https://components.atopileapi.com/v0/query
|
||||
{
|
||||
"queries": [
|
||||
{
|
||||
"package": {
|
||||
"type": "EnumSet",
|
||||
"data": {
|
||||
"elements": [
|
||||
{
|
||||
"name": "R0805"
|
||||
}
|
||||
],
|
||||
"enum": {
|
||||
"name": "BackendPackage",
|
||||
"values": {
|
||||
"R01005": "R01005",
|
||||
"R0201": "R0201",
|
||||
"R0402": "R0402",
|
||||
"R0603": "R0603",
|
||||
"R0805": "R0805",
|
||||
"R1206": "R1206",
|
||||
"R1210": "R1210",
|
||||
"R1808": "R1808",
|
||||
"R1812": "R1812",
|
||||
"R1825": "R1825",
|
||||
"R2220": "R2220",
|
||||
"R2225": "R2225",
|
||||
"R3640": "R3640",
|
||||
"C01005": "C01005",
|
||||
"C0201": "C0201",
|
||||
"C0402": "C0402",
|
||||
"C0603": "C0603",
|
||||
"C0805": "C0805",
|
||||
"C1206": "C1206",
|
||||
"C1210": "C1210",
|
||||
"C1808": "C1808",
|
||||
"C1812": "C1812",
|
||||
"C1825": "C1825",
|
||||
"C2220": "C2220",
|
||||
"C2225": "C2225",
|
||||
"C3640": "C3640",
|
||||
"L01005": "L01005",
|
||||
"L0201": "L0201",
|
||||
"L0402": "L0402",
|
||||
"L0603": "L0603",
|
||||
"L0805": "L0805",
|
||||
"L1206": "L1206",
|
||||
"L1210": "L1210",
|
||||
"L1808": "L1808",
|
||||
"L1812": "L1812",
|
||||
"L1825": "L1825",
|
||||
"L2220": "L2220",
|
||||
"L2225": "L2225",
|
||||
"L3640": "L3640",
|
||||
"SMD,4x4mm": "SMD,4x4mm",
|
||||
"SMD,6x6mm": "SMD,6x6mm",
|
||||
"SMD,5x5mm": "SMD,5x5mm",
|
||||
"SMD,3x3mm": "SMD,3x3mm",
|
||||
"SMD,8x8mm": "SMD,8x8mm",
|
||||
"SMD,12x12mm": "SMD,12x12mm",
|
||||
"SMD,12.5x12.5mm": "SMD,12.5x12.5mm",
|
||||
"SMD,7.8x7mm": "SMD,7.8x7mm",
|
||||
"SMD,4.5x4mm": "SMD,4.5x4mm",
|
||||
"SMD,11.5x10mm": "SMD,11.5x10mm",
|
||||
"SMD,6.6x7mm": "SMD,6.6x7mm",
|
||||
"SMD,7x6.6mm": "SMD,7x6.6mm",
|
||||
"SMD,5.8x5.2mm": "SMD,5.8x5.2mm",
|
||||
"SMD,6.6x7.3mm": "SMD,6.6x7.3mm",
|
||||
"SMD,3.5x3mm": "SMD,3.5x3mm",
|
||||
"SMD,7.3x7.3mm": "SMD,7.3x7.3mm",
|
||||
"SMD,6.6x7.1mm": "SMD,6.6x7.1mm",
|
||||
"SMD,7x7mm": "SMD,7x7mm",
|
||||
"SMD,5.4x5.2mm": "SMD,5.4x5.2mm",
|
||||
"SMD,6.7x6.7mm": "SMD,6.7x6.7mm",
|
||||
"SMD,11x10mm": "SMD,11x10mm",
|
||||
"SMD,10x11mm": "SMD,10x11mm",
|
||||
"SMD,5.2x5.8mm": "SMD,5.2x5.8mm",
|
||||
"SMD,4.4x4.2mm": "SMD,4.4x4.2mm",
|
||||
"SMD,13.8x12.6mm": "SMD,13.8x12.6mm",
|
||||
"SMD,10.1x10.1mm": "SMD,10.1x10.1mm",
|
||||
"SMD,13.5x12.6mm": "SMD,13.5x12.6mm",
|
||||
"SMD,4.7x4.7mm": "SMD,4.7x4.7mm",
|
||||
"SMD,12.3x12.3mm": "SMD,12.3x12.3mm",
|
||||
"SMD,12.6x13.5mm": "SMD,12.6x13.5mm",
|
||||
"SMD,2.8x2.9mm": "SMD,2.8x2.9mm",
|
||||
"SMD,7.3x6.6mm": "SMD,7.3x6.6mm",
|
||||
"SMD,2.5x2mm": "SMD,2.5x2mm",
|
||||
"SMD,4.9x4.9mm": "SMD,4.9x4.9mm",
|
||||
"SMD,10.2x10mm": "SMD,10.2x10mm",
|
||||
"SMD,7.1x6.6mm": "SMD,7.1x6.6mm",
|
||||
"SMD,10x10mm": "SMD,10x10mm",
|
||||
"SMD,5.7x5.7mm": "SMD,5.7x5.7mm",
|
||||
"SMD,4.1x4.1mm": "SMD,4.1x4.1mm",
|
||||
"SMD,4.1x4.5mm": "SMD,4.1x4.5mm",
|
||||
"SMD,7x7.8mm": "SMD,7x7.8mm",
|
||||
"SMD,10x9mm": "SMD,10x9mm",
|
||||
"SMD,0.6x1.2mm": "SMD,0.6x1.2mm",
|
||||
"SMD,6.5x6.9mm": "SMD,6.5x6.9mm",
|
||||
"SMD,1.6x2mm": "SMD,1.6x2mm",
|
||||
"SMD,2x2.5mm": "SMD,2x2.5mm",
|
||||
"SMD,7.1x6.5mm": "SMD,7.1x6.5mm",
|
||||
"SMD,8x8.5mm": "SMD,8x8.5mm",
|
||||
"SMD,4.5x4.1mm": "SMD,4.5x4.1mm",
|
||||
"SMD,4.2x4.4mm": "SMD,4.2x4.4mm",
|
||||
"SMD,10.4x10.3mm": "SMD,10.4x10.3mm",
|
||||
"SMD,10x11.5mm": "SMD,10x11.5mm",
|
||||
"SMD,13.5x12.8mm": "SMD,13.5x12.8mm",
|
||||
"SMD,17.2x17.2mm": "SMD,17.2x17.2mm",
|
||||
"SMD,5.2x5.4mm": "SMD,5.2x5.4mm",
|
||||
"SMD,11.6x10.1mm": "SMD,11.6x10.1mm",
|
||||
"SMD,10.5x10.3mm": "SMD,10.5x10.3mm",
|
||||
"SMD,7.2x6.6mm": "SMD,7.2x6.6mm",
|
||||
"SMD,10x10.2mm": "SMD,10x10.2mm",
|
||||
"SMD,7.8x7.8mm": "SMD,7.8x7.8mm",
|
||||
"SMD,1.7x2.3mm": "SMD,1.7x2.3mm",
|
||||
"SMD,5.2x5.7mm": "SMD,5.2x5.7mm",
|
||||
"SMD,2x2mm": "SMD,2x2mm",
|
||||
"SMD,4.5x5.2mm": "SMD,4.5x5.2mm",
|
||||
"SMD,9x10mm": "SMD,9x10mm",
|
||||
"SMD,2.5x2.9mm": "SMD,2.5x2.9mm",
|
||||
"SMD,4.6x4.1mm": "SMD,4.6x4.1mm",
|
||||
"SMD,7.5x7.5mm": "SMD,7.5x7.5mm",
|
||||
"SMD,5.5x5.2mm": "SMD,5.5x5.2mm",
|
||||
"SMD,6.4x6.6mm": "SMD,6.4x6.6mm",
|
||||
"SMD,12.5x13.5mm": "SMD,12.5x13.5mm",
|
||||
"SMD,10.7x10mm": "SMD,10.7x10mm",
|
||||
"SMD,5.5x5.3mm": "SMD,5.5x5.3mm",
|
||||
"SMD,10.1x11.6mm": "SMD,10.1x11.6mm",
|
||||
"SMD,10.3x10.5mm": "SMD,10.3x10.5mm",
|
||||
"SMD,3.2x3mm": "SMD,3.2x3mm",
|
||||
"SMD,6.6x6.4mm": "SMD,6.6x6.4mm",
|
||||
"SMD,1.2x0.6mm": "SMD,1.2x0.6mm",
|
||||
"SMD,1.2x1.8mm": "SMD,1.2x1.8mm",
|
||||
"SMD,5x5.2mm": "SMD,5x5.2mm",
|
||||
"SMD,8.3x8.3mm": "SMD,8.3x8.3mm",
|
||||
"SMD,10.2x10.8mm": "SMD,10.2x10.8mm",
|
||||
"SMD,2.5x3.2mm": "SMD,2.5x3.2mm",
|
||||
"SMD,4x4.5mm": "SMD,4x4.5mm",
|
||||
"SMD,8.5x8mm": "SMD,8.5x8mm",
|
||||
"SMD,3.5x3.2mm": "SMD,3.5x3.2mm",
|
||||
"SMD,12.9x13.2mm": "SMD,12.9x13.2mm",
|
||||
"SMD,8.8x8.2mm": "SMD,8.8x8.2mm",
|
||||
"SMD,4.1x4.4mm": "SMD,4.1x4.4mm",
|
||||
"SMD,10.8x10mm": "SMD,10.8x10mm",
|
||||
"SMD,10.5x10mm": "SMD,10.5x10mm",
|
||||
"SMD,1.1x1.8mm": "SMD,1.1x1.8mm",
|
||||
"SMD,7.5x7mm": "SMD,7.5x7mm",
|
||||
"SMD,3.8x3.8mm": "SMD,3.8x3.8mm",
|
||||
"SMD,1.6x2.2mm": "SMD,1.6x2.2mm",
|
||||
"SMD,12.2x12.2mm": "SMD,12.2x12.2mm",
|
||||
"SMD,4.8x4.8mm": "SMD,4.8x4.8mm",
|
||||
"SMD,5.7x5.4mm": "SMD,5.7x5.4mm",
|
||||
"SMD,15.5x16.5mm": "SMD,15.5x16.5mm",
|
||||
"SMD,8.2x8.8mm": "SMD,8.2x8.8mm",
|
||||
"SMD,10x14mm": "SMD,10x14mm",
|
||||
"SMD,5.1x5.4mm": "SMD,5.1x5.4mm",
|
||||
"SMD,16.5x15.5mm": "SMD,16.5x15.5mm",
|
||||
"SMD,2.1x3mm": "SMD,2.1x3mm",
|
||||
"SMD,10x11.6mm": "SMD,10x11.6mm",
|
||||
"SMD,3.2x4mm": "SMD,3.2x4mm",
|
||||
"SMD,7.2x7.9mm": "SMD,7.2x7.9mm",
|
||||
"SMD,5.8x5.8mm": "SMD,5.8x5.8mm",
|
||||
"SMD,6.6x7.4mm": "SMD,6.6x7.4mm",
|
||||
"SMD,12.7x12.7mm": "SMD,12.7x12.7mm",
|
||||
"SMD,1.2x2mm": "SMD,1.2x2mm",
|
||||
"SMD,1x1.7mm": "SMD,1x1.7mm",
|
||||
"SMD,4.4x4.1mm": "SMD,4.4x4.1mm",
|
||||
"SMD,4.2x4.2mm": "SMD,4.2x4.2mm"
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"qty": 1,
|
||||
"endpoint": "resistors",
|
||||
"resistance": {
|
||||
"type": "Quantity_Interval_Disjoint",
|
||||
"data": {
|
||||
"intervals": {
|
||||
"type": "Numeric_Interval_Disjoint",
|
||||
"data": {
|
||||
"intervals": [
|
||||
{
|
||||
"type": "Numeric_Interval",
|
||||
"data": {
|
||||
"min": 950.0,
|
||||
"max": 1050.0
|
||||
}
|
||||
}
|
||||
]
|
||||
}
|
||||
},
|
||||
"unit": "kiloohm"
|
||||
}
|
||||
},
|
||||
"max_power": null,
|
||||
"max_voltage": null
|
||||
}
|
||||
]
|
||||
}
|
||||
DEBUG Downloading API data C17513
|
||||
[12:07:15] DEBUG GET https://components.atopileapi.com/v0/component/lcsc/17513
|
||||
DEBUG Crawling datasheet for C17513
|
||||
[12:07:16] DEBUG {
|
||||
0: {
|
||||
0: <rx_protection_resistor|Resistor>
|
||||
}
|
||||
}
|
||||
INFO Picking 1 independent groups: {
|
||||
0: <rx_protection_resistor|Resistor>
|
||||
}
|
||||
DEBUG Attached component C17513 to module rx_protection_resistor:
|
||||
{'resistance': {'type': 'Quantity_Interval_Disjoint', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 990.0000002235174, 'max': 1009.9999997764826}}]}}, 'unit': 'ohm'}}, 'max_power': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 0.125, 'max': 0.125}}]}}, 'unit': 'watt'}},
|
||||
'max_voltage': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 150.0, 'max': 150.0}}]}}, 'unit': 'volt'}}}
|
||||
--->
|
||||
max_power: rx_protection_resistor.max_power
|
||||
max_voltage: rx_protection_resistor.max_voltage
|
||||
resistance: rx_protection_resistor.resistance
|
||||
INFO Slow-picked parts in 3.47s
|
||||
INFO Picked complete: picked 1 parts
|
||||
INFO Verify design
|
||||
DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=19----------------------------------------------------------------------
|
||||
DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1
|
||||
DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:8
|
||||
DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:8
|
||||
DEBUG Iteration 1 |stages|=5, |graphs|=8, |V|=46----------------------------------------------------------------------
|
||||
DEBUG DONE Iteration 1 Phase 1.4: Distribute literals across alias classes G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.12: Unary identity unpack G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.22: Fold IsSubset G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:8
|
||||
DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:8
|
||||
DEBUG Iteration 2 |stages|=38, |graphs|=8, |V|=44---------------------------------------------------------------------
|
||||
DEBUG DONE Iteration 2 Phase 1.3: Alias classes G:8
|
||||
DEBUG Iteration 3 |stages|=71, |graphs|=8, |V|=43---------------------------------------------------------------------
|
||||
@@ -0,0 +1,15 @@
|
||||
[12:07:12] WARNING No pickers for {
|
||||
0: <m2_with_pad|MountingHole>
|
||||
}
|
||||
WARNING No pickers and no footprint for {
|
||||
0: <dfplayer|DFPlayer_Mini>
|
||||
}.
|
||||
ATTENTION: These modules will not appear in netlist or pcb.
|
||||
INFO Picking 1 modules
|
||||
INFO Picking 1 modules in parallel
|
||||
[12:07:16] INFO Picking 1 independent groups: {
|
||||
0: <rx_protection_resistor|Resistor>
|
||||
}
|
||||
INFO Slow-picked parts in 3.47s
|
||||
INFO Picked complete: picked 1 parts
|
||||
INFO Verify design
|
||||
@@ -0,0 +1,7 @@
|
||||
[12:07:12] WARNING No pickers for {
|
||||
0: <m2_with_pad|MountingHole>
|
||||
}
|
||||
WARNING No pickers and no footprint for {
|
||||
0: <dfplayer|DFPlayer_Mini>
|
||||
}.
|
||||
ATTENTION: These modules will not appear in netlist or pcb.
|
||||
@@ -0,0 +1,8 @@
|
||||
[12:07:11] INFO Running design checks for stage POST_DESIGN
|
||||
DEBUG Running post-design check `needs_erc_check` for `runtime_anon[9]`
|
||||
INFO Checking graph for ERC violations
|
||||
INFO Checking 1 Power
|
||||
INFO Checking for hv/lv shorts
|
||||
INFO Checking for power source shorts
|
||||
INFO Checking 0 explicit nets
|
||||
INFO Checking 1 passives
|
||||
@@ -0,0 +1,7 @@
|
||||
[12:07:11] INFO Running design checks for stage POST_DESIGN
|
||||
INFO Checking graph for ERC violations
|
||||
INFO Checking 1 Power
|
||||
INFO Checking for hv/lv shorts
|
||||
INFO Checking for power source shorts
|
||||
INFO Checking 0 explicit nets
|
||||
INFO Checking 1 passives
|
||||
@@ -0,0 +1,3 @@
|
||||
[12:07:16] INFO Running checks
|
||||
INFO Running design checks for stage POST_SOLVE
|
||||
DEBUG Running post-solve check `needs_erc_check` for `runtime_anon[9]`
|
||||
@@ -0,0 +1,2 @@
|
||||
[12:07:16] INFO Running checks
|
||||
INFO Running design checks for stage POST_SOLVE
|
||||
@@ -0,0 +1,9 @@
|
||||
[12:07:11] INFO Resolving bus parameters
|
||||
DEBUG [3m Timings [0m
|
||||
┏━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━┳━━━━━━┓
|
||||
┃[1m [0m[1mCategory [0m[1m [0m┃[1m [0m[1mValue[0m[1m [0m┃[1m [0m[1mUnit[0m[1m [0m┃
|
||||
┡━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━╇━━━━━━┩
|
||||
│[36m [0m[36mget parameter connections[0m[36m [0m│[32m [0m[32m 2.98[0m[32m [0m│[33m [0m[33mms [0m[33m [0m│
|
||||
│[36m [0m[36mmerge parameters [0m[36m [0m│[32m [0m[32m943.7[0m[32m [0m│[33m [0m[33mµs [0m[33m [0m│
|
||||
└───────────────────────────┴───────┴──────┘
|
||||
|
||||
@@ -0,0 +1 @@
|
||||
[12:07:11] INFO Resolving bus parameters
|
||||
@@ -0,0 +1 @@
|
||||
[12:07:16] INFO Adding `MountingHole:MountingHole_3.2mm_M3_Pad` as `m2_with_pad` (H3)
|
||||
@@ -0,0 +1 @@
|
||||
[12:07:16] INFO Adding `MountingHole:MountingHole_3.2mm_M3_Pad` as `m2_with_pad` (H3)
|
||||
Reference in New Issue
Block a user