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DFPlayer-carrier-board/build/logs/archive/2025-09-26_00-36-19/default/picker.debug.log
2025-09-27 12:44:25 +02:00

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[00:36:21] INFO Picking 1 modules
INFO Picking 1 modules in parallel
DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=4----------------------------------------------
DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1
DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:3
DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:3
DEBUG Iteration 1 |stages|=5, |graphs|=3, |V|=11---------------------------------------------
DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:3
DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:3
DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:3
DEBUG Iteration 2 |stages|=38, |graphs|=3, |V|=10--------------------------------------------
[00:36:22] DEBUG POST https://components.atopileapi.com/v0/query
{
"queries": [
{
"package": null,
"qty": 1,
"endpoint": "resistors",
"resistance": {
"type": "Quantity_Interval_Disjoint",
"data": {
"intervals": {
"type": "Numeric_Interval_Disjoint",
"data": {
"intervals": [
{
"type": "Numeric_Interval",
"data": {
"min": 90.0,
"max": 110.0
}
}
]
}
},
"unit": "ohm"
}
},
"max_power": null,
"max_voltage": null
}
]
}
DEBUG Downloading API data C22775
[00:36:24] DEBUG GET https://components.atopileapi.com/v0/component/lcsc/22775
DEBUG Crawling datasheet for C22775
[00:36:25] DEBUG Downloading model for C22775
[00:36:26] DEBUG {
0: {
0: <r1|Resistor>
}
}
INFO Picking 1 independent groups: {
0: <r1|Resistor>
}
DEBUG Attached component C22775 to module r1:
{'resistance': {'type': 'Quantity_Interval_Disjoint', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 99.00000002235174, 'max': 100.99999997764826}}]}}, 'unit': 'ohm'}}, 'max_power': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 0.1, 'max': 0.1}}]}}, 'unit': 'watt'}},
'max_voltage': {'type': 'Quantity_Set_Discrete', 'data': {'intervals': {'type': 'Numeric_Interval_Disjoint', 'data': {'intervals': [{'type': 'Numeric_Interval', 'data': {'min': 75.0, 'max': 75.0}}]}}, 'unit': 'volt'}}}
--->
max_power: r1.max_power
max_voltage: r1.max_voltage
resistance: r1.resistance
INFO Slow-picked parts in 4.7s
INFO Picked complete: picked 1 parts
INFO Verify design
DEBUG Iteration 0 |stages|=1, |graphs|=1, |V|=7----------------------------------------------
DEBUG DONE Iteration 0 Phase 1.0: Canonical literal form G:1
DEBUG DONE Iteration 0 Phase 1.2: Constrain within and domain G:3
DEBUG DONE Iteration 0 Phase 1.3: Alias predicates to true G:3
DEBUG Iteration 1 |stages|=5, |graphs|=3, |V|=17---------------------------------------------
DEBUG DONE Iteration 1 Phase 1.24: Merge intersecting subsets G:3
DEBUG DONE Iteration 1 Phase 1.25: Predicate flat terminate G:3
DEBUG DONE Iteration 1 Phase 1.27: Predicate is!! True G:3
DEBUG Iteration 2 |stages|=38, |graphs|=3, |V|=16--------------------------------------------